Campbell Scientific CR3000 CR3000 Micrologger - Page 291
Signal Settling Time
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Section 8. Operation approximately 170 µs, leaving a maximum input-settling time of approximately 8160 µs (8333 µs - 170 µs). If the maximum input-settling time is exceeded, 60Hz line-noise rejection will not occur. For 50-Hz rejection, the maximum input settling time is approximately 9830 µs (10,000 µs - 170 µs). The CR3000 does not prevent or warn against setting the settling time beyond the half-cycle limit. Table ac Noise Rejection on Large Signals (p. 291) lists details of the half-cycle acpower line-noise rejection technique. Table 58. ac Noise Rejection on Large Signals Applies to analog input voltage ranges mV1000 and mV5000. ac Power Line Frequency Measurement Integration Time CRBasic Integration Code Default Settling Time Maximum Recommended Settling Time* 60 Hz 250 μs x 2 _60Hz 3000 μs 8330 μs 50 Hz 250 μs x 2 _50Hz 3000 μs 10000 μs *Excitation time and settling time are equal in measurements requiring excitation. The CR3000 cannot excite VX / EX or IX excitation channels during A/D conversion. The one-half-cycle technique with excitation limits the length of recommended excitation and settling time for the first measurement to one-half-cycle. The CR3000 does not prevent or warn against setting a settling time beyond the one-half-cycle limit. For example, a settling time of up to 50000 µs can be programmed, but the CR3000 will execute the measurement as follows: 1. CR3000 turns excitation on, waits 50000 µs, and then makes the first measurement. 2. During A/D, CR3000 turns off excitation for ≈170 µs. 3. Excitation is switched on again for one-half cycle, then the second measurement is made. Restated, when the CR3000 is programmed to use the half-cycle 50-Hz or 60-Hz rejection techniques, a sensor does not see a continuous excitation of the length entered as the settling time before the second measurement if the settling time entered is greater than one-half cycle. This causes a truncated second excitation. Depending on the sensor used, a truncated second excitation may cause measurement errors. 8.1.2.8 Signal Settling Time When the CR3000 switches to an analog input channel or activates excitation for a bridge measurement, a settling time is required for the measured voltage to settle to its true value before being measured. The rate at which the signal settles is determined by the input settling time constant, which is a function of both the source resistance and fixed input capacitance (3.3 nfd) of the CR3000. Rise and decay waveforms are exponential. Figure Input Voltage Rise and Transient Decay (p. 291) shows rising and decaying waveforms settling to the true signal level, Vso. Figure 92: Input voltage rise and transient decay 291