EVGA 113-YW-E115-TR User Manual - Page 72
CPU FSB, Chipset Voltage, Memory, CPU PLL, GTLVREF Lane 0, GTLVREF Lane 1, GTLVREF Lane 2, GTLVREF
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CPU FSB Use the Page Up and Page Down keys to scroll through the voltages or select [Auto] to automatically set the voltage level for the CPU FSB. Chipset Voltage This function defines the core voltage level for the NVIDIA nForce SPP chip. Use the Page Up and Page Down keys to select a voltage (1.1, 1.2V, 1.3V, 1.4V) or select [Auto]to automatically set the voltage. Memory This function defines the voltage level for the DRAM. Use the Page Up and Page Down keys to select a voltage or select [Auto] to automatically set the voltage. CPU PLL This function defines the voltage level for the CPU PLL. Use the Page Up and Page Down keys to select a voltage or select [Auto]to automatically set the voltage. GTLVREF Lane 0 This function defines the voltage level for GTLVREF Lane 0. Use the Page Up and Page Down keys to select a voltage or select [Auto]to automatically set the voltage. GTLVREF Lane 1 This function defines the voltage level for GTLVREF Lane 1. Use the Page Up and Page Down keys to select a voltage or select [Auto]to automatically set the voltage. GTLVREF Lane 2 This function defines the voltage level for GTLVREF Lane 2. Use the Page Up and Page Down keys to select a voltage or select [Auto]to automatically set the voltage. GTLVREF Lane 3 This function defines the voltage level for GTLVREF Lane 3. Use the Page Up and Page Down keys to select a voltage or select [Auto]to automatically set the voltage. EVGA 62