GAD 42 MAINTENANCE MANUAL
Page 3
P/N 190-00159-01
Rev. A
TABLE OF CONTENTS
Paragraph
Page
1.0
INTRODUCTION
....................................................................................................
4
2.0
REPAIR
..................................................................................................................
4
3.0
TECHNICAL SPECIFICATIONS
.............................................................................
4
4.0
GAD 42 INSTALLATION
.........................................................................................
4
5.0
GENERAL DESCRIPTION
.....................................................................................
4
5.1
Analog PC Board
..............................................................................................
4
5.2
CPU PC Board
..................................................................................................
5
6.0
BLOCK DIAGRAM
..................................................................................................
5
7.0
BASIC THEORY OF OPERATION
.........................................................................
5
7.1
Power Supplies
.................................................................................................
5
7.1.1
Power Input Circuitry
.........................................................................................
5
7.1.2
Main Power Supply
...........................................................................................
5
7.1.3
Power Supply (+5 V)
.........................................................................................
6
7.1.4
Power Supply (-5 V)
..........................................................................................
6
7.2
Superflag Output Drivers
...................................................................................
6
7.3
XYZ Synchro Input Processing
.........................................................................
6
7.4
Filter/Attenuator
................................................................................................
6
7.5
Synchronous Rectifier
.......................................................................................
7
7.6
26 VAC Reference Inputs
.................................................................................
7
7.7
Synchro Analog-to-Digital Converter
.................................................................
7
7.8
DC Analog-to-Digital Converter
.........................................................................
7
7.9
XYZ Synchro Output Processing
.......................................................................
8
7.10
Digital-to-Analog Converter
...............................................................................
8
7.11
Output Amplifiers
..............................................................................................
8
7.12
CPU Circuitry
....................................................................................................
9
7.13
FPGA Devices
..................................................................................................
9
7.14
Serial EEPROM
................................................................................................
9
7.15
ARINC 429 Receivers
.......................................................................................
9
7.16
ARINC Transmitters
........................................................................................
10
7.17
ARINC 561/568 Transmitters
..........................................................................
10
7.18
King Serial Transmitters
..................................................................................
10
7.19
Discrete Inputs
................................................................................................
10
7.20
Valid High Inputs
.............................................................................................
11
7.21
Control Outputs
...............................................................................................
11
8.0
ASSEMBLY DRAWING
........................................................................................
11
1.0
INTRODUCTION