Garmin GAD 42 Maintenance Manual - Page 7

Power Supply +5 V, Power Supply -5 V, Superflag Output Drivers, XYZ Synchro Input Processing - maintenance manual

Page 7 highlights

The +20 V and -20 V outputs are used to power the XYZ synchro output amps. +12 V and -12 V are used as IC and output driver supplies. +34 V is used to charge backup storage capacitors. These backup capacitors are used to supply power to the +5V power supply for up to one half second during power interruptions. Low pass output filters are present on the +12 V and -12 V outputs. These filters serve to reduce output ripple voltage. Due to parasitic transformer effects, the primary voltage tends to rise to a very high voltage for a short interval of time when the switch turns off. The snubber circuit conducts current during the time this voltage spike is greater than 24 V above the input voltage, and returns some of the energy to the power supply input capacitor. The snubber operation is critical to protecting the controller IC output switch from over-voltage. Also critical to protecting the controller IC output switch from over-voltage is the soft start circuit. Frequency compensation for the main power supply control loop maintains loop stability under all load and input voltage conditions. 7.1.3 Power Supply (+5 V) The +5 V power supply is a buck topology switcher controlled by an integrated circuit controller and switch operating at a fixed frequency of 100 kHz. The switcher along with filter circuitry produces a smoothed and filtered +5 V. Frequency compensation for the +5 V Power Supply control loop consists of an RC network which maintains loop stability under all load and input voltage conditions. If the power input voltage drops below approximately +8 V, an undervoltage detector turns on a FET switch allowing the backup storage capacitors to power the +5 V supply through a blocking diode. The blocking diode isolates the power input voltage supply from the backup storage capacitor voltage supply. 7.1.4 Power Supply (-5 V) The -5 V power supply provides bias voltage for the CMOS analog switches in the GAD 42. A switched capacitor inverter generates the -5 V output from +5 V input. 7.2 Superflag Output Drivers The GAD 42 has four superflag outputs, each driven by a FET superflag driver switch. The FET's are turned on when driver transistors are turned on, causing a bias voltage to be developed across the gate-source junction of each FET, turning it on. The FET switches are protected from over-voltage transients by transient suppression zeners. 7.3 XYZ Synchro Input Processing Because all XYZ synchro inputs (shown in the upper left corner of the block diagram) are processed by identical circuitry, only the 11.8 Vac heading inputs, HEADING X and HEADING Y are discussed here. All Z synchro inputs are grounded in the GAD 42. GAD 42 MAINTENANCE MANUAL P/N 190-00159-01 Page 6 Rev. A

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GAD 42 MAINTENANCE MANUAL
Page 6
P/N 190-00159-01
Rev. A
The +20 V and –20 V outputs are used to power the XYZ synchro output amps.
+12 V and
–12 V are used as IC and output driver supplies.
+34 V is used to charge backup storage
capacitors.
These backup capacitors are used to supply power to the +5V power supply for up to
one half second during power interruptions. Low pass output filters are present on the +12 V and
–12 V outputs.
These filters serve to reduce output ripple voltage.
Due to parasitic transformer effects, the primary voltage tends to rise to a very high voltage for a
short interval of time when the switch turns off.
The snubber circuit conducts current during the
time this voltage spike is greater than 24 V above the input voltage, and returns some of the
energy to the power supply input capacitor.
The snubber operation is critical to protecting the
controller IC output switch from over-voltage. Also critical to protecting the controller IC output
switch from over-voltage is the soft start circuit. Frequency compensation for the main power
supply control loop maintains loop stability under all load and input voltage conditions.
7.1.3
Power Supply (+5 V)
The +5 V power supply is a buck topology switcher controlled by an integrated circuit controller
and switch operating at a fixed frequency of 100 kHz.
The switcher along with filter circuitry
produces a smoothed and filtered +5 V. Frequency compensation for the +5 V Power Supply
control loop consists of an RC network which maintains loop stability under all load and input
voltage conditions.
If the power input voltage drops below approximately +8 V, an undervoltage detector turns on a
FET switch allowing the backup storage capacitors to power the +5 V supply through a blocking
diode. The blocking diode isolates the power input voltage supply from the backup storage
capacitor voltage supply.
7.1.4
Power Supply (-5 V)
The –5 V power supply provides bias voltage for the CMOS analog switches in the GAD 42.
A
switched capacitor inverter generates the –5 V output from +5 V input.
7.2
Superflag Output Drivers
The GAD 42 has four superflag outputs, each driven by a FET superflag driver switch.
The
FET’s are turned on when driver transistors are turned on, causing a bias voltage to be developed
across the gate-source junction of each FET, turning it on.
The FET switches are protected from
over-voltage transients by transient suppression zeners.
7.3
XYZ Synchro Input Processing
Because all XYZ synchro inputs (shown in the upper left corner of the block diagram) are
processed by identical circuitry, only the 11.8 Vac heading inputs, HEADING X and HEADING
Y are discussed here.
All Z synchro inputs are grounded in the GAD 42.