Gigabyte C7V7-CSI Manual - Page 32

DRDY_Timing, Memory Hole, System BIOS Cacheable, Video RAM Cacheable, Init Display First

Page 32 highlights

English DRDY_Timing Default Set DRDY_Timing to default. Slowest Set DRDY_Timing to slowest. Optimize Set DRDY_Timing to optimize. Memory Hole Disabled Disabled this function. (Default value) 15M-16M Enabled VLink 8x support. System BIOS Cacheable Disabled Disabled System BIOS Cacheable. Enabled Enabled System BIOS Cacheable. (Default value) Video RAM Cacheable Disabled Disabled Video RAM Cacheable. (Default value) Enabled Enabled Video RAM Cacheable. Init Display First This feature allows you to select the first initiation of the monitor display from which card when you install a PCI card and a VGA card on the motherboard. AGP Set Init display first to VGA card. PCI slot Set Init display first to PCI.(Default value) GA-C7V7-RH Motherboard - 32 -

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GA-C7V7-RH Motherboard
- 32 -
English
DRDY_Timing
Default
Set DRDY_Timing to default.
Slowest
Set DRDY_Timing to slowest.
Optimize
Set DRDY_Timing to optimize.
Memory Hole
Disabled
Disabled this function. (Default value)
15M-16M
Enabled VLink 8x support.
System BIOS Cacheable
Disabled
Disabled System BIOS Cacheable.
Enabled
Enabled System BIOS Cacheable. (Default value)
Video RAM Cacheable
Disabled
Disabled Video RAM Cacheable. (Default value)
Enabled
Enabled Video RAM Cacheable.
Init Display First
This feature allows you to select the first initiation of the monitor display from which card when you
install a PCI card and a VGA card on the motherboard.
AGP
Set Init display first to VGA card.
PCI slot
Set Init display first to PCI.(Default value)