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Hitachi 7K100 Hard Drive Specifications - Page 78

Status Register

UPC - 683728198671

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10.13 Status Register Table 44: Status Register 7 6 5 4 3 2 1 0 BSY DRDY DF DSC DRQ CORR IDX ERR This register contains the device status. The contents of this register are updated whenever an error occurs and at the completion of each command. If the host reads this register when an interrupt is pending, it is considered to be the interrupt acknowledge. Any pending interrupt is cleared whenever this register is read. If BSY=1, no other bits in the register are valid. Bit Definitions BSY DRDY (RDY) DF DSC DRQ CORR IDX ERR Busy. BSY=1 whenever the device is accessing the registers. The host should not read or write any registers when BSY=1. If the host reads any register when BSY=1, the contents of the Status Register will be returned. Device Ready. RDY=1 indicates that the device is capable of responding to a command. RDY will be set to 0 during power on until the device is ready to accept a command. Device Fault. DF=1indicates that the device has detected a write fault condition. DF is set to 0 after the Status Register is read by the host. Device Seek Complete. DSC=1indicates that a Seek has completed and the device head is settled over a track. DSC is set to 0 by the device just before a Seek begins. When an error occurs, this bit is not changed until the Status Register is read by the host and at that time the bit again indicates the current Seek complete status. When the device enters into or is in Standby mode or Sleep mode, this bit is set by device in spite of the drive not spinning up. Data Request. DRQ=1 indicates that the device is ready to transfer a word or byte of data between the host and the device. The host should not write the Command register when DRQ=1. Corrected Data. Always 0 Index. IDX=1 once per revolution. Since IDX=1 only for a very short time during each revolution, the host may not see it set to 1 even if the host is reading the Status Register continuously. Therefore the host should not attempt to use IDX bit for timing purposes. Error. ERR=1 indicates that an error occurred during execution of the previous command. The Error Register should be read to determine the error type. The device sets bit ERR=0 when the next command is received from the host. Travelstar 7K100 Hard Disk Drive Specification 64

Section	Page
1.0 General	15
1.1 Introduction	15
1.2 References	15
1.3 Abbreviations	15
1.4 Caution	17
1.5 Drive handling precautions	17
2.0 Outline of the drive	19
3.0 Fixed-disk subsystem description	23
3.1 Control electronics	23
3.2 Head disk assembly data	23
4.0 Drive characteristics	25
4.1 Formatted capacity	25
4.2 Data sheet	25
4.3 Cylinder allocation	26
4.4 Performance characteristics	27
4.4.1 Command overhead	27
4.4.2 Mechanical positioning	28
4.4.3 Operating modes	30
5.0 Data integrity	31
5.1 Data loss at power off	31
5.2 Write Cache	31
5.3 Equipment status	31
5.4 WRITE safety	32
5.5 Data buffer test	32
5.6 Error recovery	32
5.7 Automatic reallocation	32
5.8 ECC	33
6.0 Specification	35
6.1 Environment	35
6.1.1 Temperature and humidity	35
6.1.2 Radiation noise	37
6.1.3 Conductive noise	37
6.1.4 Magnetic fields	37
6.2 DC power requirements	38
6.2.1 Power consumption efficiency	38
6.3 Reliability	39
6.3.1 Data Reliability	39
6.3.2 Failure prediction (S.M.A.R.T.)	39
6.3.3 Cable noise interference	39
6.3.4 Service life and usage condition	39
6.3.5 Preventive maintenance	39
6.3.6 Load/unload	40
6.4 Mechanical specifications	42
6.4.1 Physical dimensions and weight	42
6.4.2 Mounting hole locations	42
6.4.3 Connector and jumper description	42
6.4.4 Mounting orientation	43
6.4.5 Load/unload mechanism	43
6.5 Vibration and shock	44
6.5.1 Operating vibration	44
6.5.2 Nonoperating vibration	45
6.5.3 Operating shock	45
6.5.4 Nonoperating shock	45
6.6 Acoustics	46
6.6.1 Sound power levels	46
6.6.2 Discrete tone penalty	46
6.7 Identification labels	47
6.8 Electromagnetic compatibility	47
6.8.1 CE mark	47
6.8.2 C-TICK mark	47
6.8.3 BSMI mark	47
6.8.4 MIC mark	47
6.9 Safety	48
6.9.1 UL and CSA approval	48
6.9.2 IEC compliance	48
6.9.3 German safety mark	48
6.9.4 Flammability	48
6.9.5 Secondary circuit protection	48
6.10 Packaging	48
7.0 Electrical interface specification	49
7.1 Cabling	49
7.2 Interface connector	49
7.3 Signal definitions	50
7.4 Signal descriptions	51
7.5 Interface logic signal levels	54
7.6 Reset timings	54
7.7 PIO timings	55
7.8 Multi word DMA timings	56
7.9 Ultra DMA timings	57
7.9.1 Initiating Read DMA	57
7.9.2 Host Pausing Read DMA	58
7.9.3 Host Terminating Read DMA	59
7.9.4 Device Terminating Read DMA	60
7.9.5 Initiating Write DMA	61
7.9.6 Device Pausing Write DMA	62
7.9.7 Device Terminating Write DMA	63
7.9.8 Host Terminating Write DMA	64
7.10 Drive address setting	65
7.11 Addressing of HDD registers	66
8.0 General	69
8.1 Introduction	69
8.2 Terminology	69
9.0 Deviations from standard	71
10.0 Register	73
10.1 Alternate Status Register	74
10.2 Command Register	74
10.3 Data Register	74
10.4 Device Control Register	75
10.5 Drive Address Register	75
10.6 Device Register	76
10.7 Error Register	76
10.8 Features Register	77
10.9 LBA High Register	77
10.10 LBA Low Register	77
10.11 LBA Mid Register	77
10.12 Sector Count Register	77
10.13 Status Register	78
11.0 General	79
11.1 Reset response	79
11.2 Register initialization	80
11.3 Diagnostic and Reset considerations	81
11.4 Power-off considerations	82
11.4.1 Load/Unload	82
11.4.2 Emergency unload	82
11.4.3 Required power-off sequence	82
11.5 Sector Addressing Mode	83
11.5.1 Logical CHS addressing mode	83
11.5.2 LBA addressing mode	83
11.6 Power management features	84
11.6.1 Power mode	84
11.6.2 Power management commands	84
11.6.3 Standby/Sleep command completion time	84
11.6.4 Standby timer	85
11.6.5 Status	85
11.6.6 Interface capability for power modes	85
11.6.7 Initial Power Mode at Power On	85
11.7 Advanced Power Management (ABLE-3) feature	85
11.7.1 Performance Idle Mode	86
11.7.2 Active Idle Mode	86
11.7.3 Low Power Idle Mode	86
11.7.4 Transition time	86
11.8 S.M.A.R.T. Function	87
11.8.1 Attributes	87
11.8.2 Attribute values	87
11.8.3 Attribute thresholds	87
11.8.4 Threshold exceeded condition	87
11.8.5 S.M.A.R.T. commands	87
11.8.6 S.M.A.R.T. operation with power management modes	88
11.9 Security Mode Feature Set	88
11.9.1 Security mode	88
11.9.2 Security level	88
11.9.3 Password	89
11.9.4 Master Password Revision Code	89
11.9.5 Command table	92
11.10 Protected Area Function	93
11.10.1 Example for operation (In LBA Mode)	93
11.10.2 Set Max security extension commands	94
11.11 Address Offset Feature (vendor specific)	95
11.11.1 Enable/Disable Address Offset Mode	95
11.11.2 Identify Device Data	96
11.11.3 Exceptions in Address Offset Mode	96
11.12 Seek Overlap	97
11.13 Write Cache function	97
11.14 Reassign Function	98
11.14.1 Auto Reassign Function	98
11.15 48-bit Address Feature Set	99
12.0 Command protocol	101
12.1 Data In commands	101
12.2 Data Out Commands	102
12.3 Non-data commands	103
12.4 DMA Data Transfer commands:	105
13.0 Command descriptions	107
13.1 Check Power Mode (E5h/98h)	112
13.2 Device Configuration Overlay (B1h)	113
13.2.1 DEVICE CONFIGURATION RESTORE (subcommand C0h)	113
13.2.2 DEVICE CONFIGURATION FREEZE LOCK (subcommand C1h)	113
13.2.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h)	114
13.2.4 DEVICE CONFIGURATION SET (subcommand C3h)	114
13.3 Execute Device Diagnostic (90h)	116
13.4 Flush Cache (E7h)	117
13.5 Flush Cache EXT (EAh)	118
13.6 Format Track (50h: vendor specific)	119
13.7 Format Unit (F7h: vendor specific)	120
13.8 Identify Device (ECh)	121
13.9 Idle (E3h/97h)	130
13.10 Idle Immediate (E1h/95h)	131
13.11 Initialize Device Parameters (91h)	132
13.12 Read Buffer (E4h)	133
13.13 Read DMA (C8h/C9h)	134
13.14 Read DMA EXT (25h)	136
13.15 Read Log Ext (2Fh)	138
13.15.1 General Purpose Log Directory	139
13.15.2 Extended Comprehensive SMART Error Log	140
13.15.3 Extended Self-test log sector	142
13.16 Read Long (22h/23h)	144
13.17 Read Multiple (C4h)	146
13.18 Read Multiple EXT (29h)	148
13.19 Read Native Max ADDRESS (F8h)	149
13.20 Read Native Max ADDRESS EXT (27h)	150
13.21 Read Sectors (20h/21h)	151
13.22 Read Sector(s) EXT (24h)	152
13.23 Read Verify Sectors (40h/41h)	154
13.24 Ready Verify Sector(s) EXT (42h)	156
13.25 Recalibrate (1xh)	158
13.26 Security Disable Password (F6h)	159
13.27 Security Erase Prepare (F3h)	160
13.28 Security Erase Unit (F4h)	161
13.29 Security Freeze Lock (F5h)	163
13.30 Security Set Password (F1h)	164
13.31 Security Unlock (F2h)	166
13.32 Seek (7xh)	167
13.33 Sense Condition (F0h: vendor specific)	168
13.34 Set Features (EFh)	169
13.35 Set Max ADDRESS (F9h)	171
13.36 Set Max ADDRESS EXT (37h)	173
13.37 Set Multiple (C6h)	175
13.38 Sleep (E6h/99h)	176
13.39 S.M.A.R.T. Function Set (B0h)	177
13.39.1 S.M.A.R.T. Function Subcommands	178
13.39.2 Device Attribute Data Structure	183
13.39.3 Device Attribute Thresholds data structure	188
13.39.4 S.M.A.R.T. Log Directory	190
13.39.5 S.M.A.R.T. error log sector	190
13.39.6 Self-test log data structure	193
13.39.7 Selective self-test log data structure	193
13.39.8 Error reporting	194
13.40 Standby (E2h/96h)	195
13.41 Standby Immediate (E0h/94h)	196
13.42 Write Buffer (E8h)	197
13.43 Write DMA (CAh/CBh)	198
13.44 Write DMA EXT (35h)	200
13.45 Write Log Ext (3Fh)	202
13.46 Write Long (32h/33h)	203
13.47 Write Multiple (C5h)	205
13.48 Write Multiple EXT (39h)	206
13.49 Write Sectors (30h/31h)	208
13.50 Write Sectors(s) EXT (34h)	210
13.51 Write Verify (3Ch: vendor specific)	211
14.0 Time-out values	213
15.0 Appendix	215
15.1 Commands Support Coverage	215
15.2 SET FEATURES Commands Support Coverage	217

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Travelstar 7K100 Hard Disk Drive Specification

10.13

Status Register

Table 44: Status Register

This register contains the device status. The contents of this register are updated whenever an error occurs and at

the completion of each command.

If the host reads this register when an interrupt is pending, it is considered to be the interrupt acknowledge. Any

pending interrupt is cleared whenever this register is read.

If BSY=1, no other bits in the register are valid.

Bit

Definitions

BSY

DRDY

DSC

DRQ

CORR

IDX

ERR

BSY

Busy. BSY=1 whenever the device is accessing the registers. The host should not read or write

any registers when BSY=1. If the host reads any register when BSY=1, the contents of the Status

DRDY

(RDY)

Device Ready. RDY=1 indicates that the device is capable of responding to a command. RDY

will be set to 0 during power on until the device is ready to accept a command.

Device Fault. DF=1indicates that the device has detected a write fault condition. DF is set to 0

after the Status Register is read by the host.

DSC

Device Seek Complete. DSC=1indicates that a Seek has completed and the device head is settled

over a track.

DSC is set to 0 by the device just before a Seek begins. When an error occurs, this

bit is not changed until the Status Register is read by the host and at that time the bit again indi-

cates the current Seek complete status. When the device enters into or is in Standby mode or

Sleep mode, this bit is set by device in spite of the drive not spinning up.

DRQ

Data Request.

DRQ=1 indicates that the device is ready to transfer a word or byte of data

between the host and the device. The host should not write the Command register when DRQ=1.

CORR

Corrected Data. Always 0

IDX

Index.

IDX=1 once per revolution. Since IDX=1 only for a very short time during each revolu-

tion, the host may not see it set to 1 even if the host is reading the Status Register continuously.

Therefore the host should not attempt to use IDX bit for timing purposes.

ERR

Error. ERR=1 indicates that an error occurred during execution of the previous command. The

Error Register should be read to determine the error type. The device sets bit ERR=0 when the

next command is received from the host.