Intel BOXD865PCDL Product Specification - Page 22

Memory Configurations

Page 22 highlights

Intel Desktop Board D865PCD Technical Product Specification 1.5.1 Memory Configurations The Intel 82865P MCH component provides two features for enhancing memory throughput: • Dual Channel memory interface. The board has two memory channels, each with a single DIMM socket, as shown in Figure 3 • Dynamic Addressing Mode. Dynamic mode minimizes overhead by reducing memory accesses Table 5 summarizes the characteristics of Dual and Single Channel configurations with and without the use of Dynamic Mode. Table 5. Characteristics of Dual/Single Channel Configuration with/without Dynamic Mode Throughput Level Configuration Characteristics Highest Dual Channel with Dynamic Mode DIMMs matched (Example configuration shown in Figure 4) Single Channel with Dynamic Mode Single DIMM (Example configuration shown in Figure 5) Single Channel without Dynamic Mode DIMMs not matched (Example configuration shown in Figure 6) Lowest Channel A DIMM Channel B, DIMM OM17042 Figure 3. Memory Channel Configuration 22

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Intel Desktop Board D865PCD Technical Product Specification
22
1.5.1
Memory Configurations
The Intel 82865P MCH component provides two features for enhancing memory throughput:
Dual Channel memory interface.
The board has two memory channels, each with a single
DIMM socket, as shown in Figure 3
Dynamic Addressing Mode.
Dynamic mode minimizes overhead by reducing memory
accesses
Table 5 summarizes the characteristics of Dual and Single Channel configurations with and
without the use of Dynamic Mode.
Table 5.
Characteristics of Dual/Single Channel Configuration with/without Dynamic Mode
Throughput
Level
Configuration
Characteristics
Highest
Dual Channel with Dynamic Mode
DIMMs matched
(Example configuration shown in Figure 4)
Single Channel with Dynamic Mode
Single DIMM
(Example configuration shown in Figure 5)
Single Channel without Dynamic Mode
DIMMs not matched
(Example configuration shown in Figure 6)
Lowest
OM17042
Channel A DIMM
Channel B, DIMM
Figure 3.
Memory Channel Configuration