Intel D510MO Product Specification - Page 45
Signal Tables for the Connectors and Headers, Table 13., Serial Port Header COM 1 and COM 2
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Technical Reference 2.2.2.1 Signal Tables for the Connectors and Headers Table 13. Serial Port Header (COM 1 and COM 2) Pin Signal Name Pin Signal Name 1 DCD (Data Carrier Detect) 3 TXD# (Transmit Data) 5 Ground 7 RTS (Request To Send) 9 RI (Ring Indicator) 2 RXD# (Receive Data) 4 DTR (Data Terminal Ready) 6 DSR (Data Set Ready) 8 CTS (Clear To Send) 10 Key (no pin) Table 14. LVDS Data Connector - 30-Pin (Optional) Pin 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 Signal Name LA_CLKN LA_CLKP EDID_3.3V LA_DATAN0 LA_DATAP0 LA_DATAN1 LA_DATAP1 GND LA_DATAN2 LA_DATAP2 GND GND 3.3 V/5 V/12 V 3.3 V/5 V/12 V EDID_CLK Description LVDS Channel A diff clock output negative LVDS Channel A diff clock output positive Power for EDID ROM LVDS Channel A diff data output - negative LVDS Channel A diff data output - positive LVDS Channel A diff data output - negative LVDS Channel A diff data output - positive Ground LVDS Channel A diff data output - negative LVDS Channel A diff data output - positive Ground Ground Selectable LCD power output Selectable LCD power output EDID/DDC clock signal Pin 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 Signal Name NC Description NC EDID_GND NC Ground for EDID signaling NC NC NC GND NC Ground NC GND GND 3.3 V/5 V/12 V 3.3 V/5 V/12 V EDID_DATA Ground Ground Selectable LCD power output Selectable LCD power output EDID/DDC data signal 45