Intel D915GVWB Product Specification - Page 24

PCI Express Connectors - windows 7

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Intel Desktop Board D915GVWB Technical Product Specification For compatibility, the underlying Serial ATA functionality is transparent to the operating system. The Serial ATA controller can operate in both legacy and native modes. In legacy mode, standard IDE I/O and IRQ resources are assigned (IRQ 14 and 15). In Native mode, standard PCI Conventional bus resource steering is used. Native mode is the preferred mode for configurations using the Windows* XP and Windows 2000 operating systems. NOTE Many Serial ATA drives use new low-voltage power connectors and require adaptors or power supplies equipped with low-voltage power connectors. For more information, see: http://www.serialata.org/ For information about The location of the Serial ATA IDE connectors Refer to Figure 16, page 48 1.6.4 Real-Time Clock, CMOS SRAM, and Battery A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer is not plugged into a wall socket, the battery has an estimated life of three years. When the computer is plugged in, the standby current from the power supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied. NOTE If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS RAM at power-on. 1.7 PCI Express Connectors The board provides one PCI Express X1 connector. The x1 interface supports simultaneous transfer speeds up to 500 MBytes/sec The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the underlying PCI Express architecture is compatible with PCI Conventional compliant operating systems. Additional features of the PCI Express interface includes the following: • Support for the PCI Express enhanced configuration mechanism • Automatic discovery, link training, and initialization • Support for Active State Power Management (ASPM) • SMBus 2.0 support • Wake# signal supporting wake events from ACPI S1, S3, S4, or S5 • Software compatible with the PCI Power Management Event (PME) mechanism defined in the PCI Power Management Specification Rev. 1.1 24

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Intel Desktop Board D915GVWB Technical Product Specification
24
For compatibility, the underlying Serial ATA functionality is transparent to the operating system.
The Serial ATA controller can operate in both legacy and native modes.
In legacy mode, standard
IDE I/O and IRQ resources are assigned (IRQ 14 and 15).
In Native mode, standard PCI
Conventional bus resource steering is used.
Native mode is the preferred mode for configurations
using the Windows* XP and Windows 2000 operating systems.
±
NOTE
Many Serial ATA drives use new low-voltage power connectors and require adaptors or power
supplies equipped with low-voltage power connectors.
For more information, see:
For information about
Refer to
The location of the Serial ATA IDE connectors
Figure 16, page 48
1.6.4
Real-Time Clock, CMOS SRAM, and Battery
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory.
When the computer
is not plugged into a wall socket, the battery has an estimated life of three years.
When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to
±
13 minutes/year at 25 ºC with 3.3 VSB applied.
±
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
1.7 PCI Express Connectors
The board provides one PCI Express X1 connector.
The x1 interface supports simultaneous
transfer speeds up to 500 MBytes/sec
The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the
underlying PCI Express architecture is compatible with PCI Conventional compliant operating
systems.
Additional features of the PCI Express interface includes the following:
•
Support for the PCI Express enhanced configuration mechanism
•
Automatic discovery, link training, and initialization
•
Support for Active State Power Management (ASPM)
•
SMBus 2.0 support
•
Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
•
Software compatible with the PCI Power Management Event (PME) mechanism defined in the
PCI Power Management Specification Rev. 1.1