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Intel D945GCCR Product Specification - Page 44

Fixed I/O Map

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Intel Desktop Board D945GCCR Technical Product Specification 2.3 Fixed I/O Map Table 11. I/O Map Address (hex) Size Description 0000 - 00FF 256 bytes Used by the Desktop Board D945GCCR. Refer to the ICH7 data sheet for dynamic addressing information. 01F0 - 01F7 8 bytes Primary Parallel ATA IDE channel command block 0228 - 022F (Note 1) 8 bytes LPT3 0278 - 027F (Note 1) 8 bytes LPT2 02E8 - 02EF (Note 1) 8 bytes COM4 02F8 - 02FF (Note 1) 8 bytes COM2 0374 - 0377 4 bytes Secondary Parallel ATA IDE channel control block 0378 - 037F 8 bytes LPT1 03E8 - 03EF 8 bytes COM3 03F0 - 03F5 6 bytes Diskette channel 03F4 - 03F7 1 byte Primary Parallel ATA IDE channel control block 03F8 - 03FF 8 bytes COM1 04D0 - 04D1 2 bytes Edge/level triggered PIC LPTn + 400 8 bytes ECP port, LPTn base address + 400h 0CF8 - 0CFB (Note 2) 4 bytes PCI Conventional bus configuration address register 0CF9 (Note 3) 1 byte Reset control register 0CFC - 0CFF 4 bytes PCI Conventional bus configuration data register FFA0 - FFA7 8 bytes Primary Parallel ATA IDE bus master registers Notes: 1. Default, but can be changed to another address range 2. Dword access only 3. Byte access only NOTE Some additional I/O addresses are not available due to ICH7 address aliasing. The ICH7 data sheet provides more information on address aliasing. For information about Obtaining the ICH7 data sheet Refer to Section 1.2, page 15 44

Section	Page
Intel® Desktop Board D945GCCR Technical Product Specification	1
Revision History / Disclaimer	2
Preface	3
Intended Audience	3
What This Document Contains	3
Typographical Conventions	3
Contents	5
1 Product Description	9
1.1 Overview	10
1.1.1 Feature Summary	10
1.1.2 Board Layout	12
1.1.3 Block Diagram	14
1.2 Online Support	15
1.3 Processor	15
1.4 System Memory	16
1.4.1 Memory Configurations	18
1.5 Intel® 945GC Chipset	21
1.5.1 Intel 945GC Graphics Subsystem	21
1.5.2 USB	23
1.5.3 IDE Support	24
1.5.4 Real-Time Clock, CMOS SRAM, and Battery	25
1.6 PCI Express* Connectors	25
1.7 Legacy I/O Controller	26
1.7.1 Serial Port	26
1.7.2 Parallel Port	26
1.7.3 Diskette Drive Controller	26
1.7.4 Keyboard and Mouse Interface	26
1.8 Audio Subsystem	27
1.8.1 Audio Subsystem Software	27
1.8.2 Audio Connectors	27
1.8.3 6-Channel (5.1) Audio Subsystem	28
1.9 LAN Subsystem	29
1.9.1 LAN Subsystem Software	29
1.9.2 Intel® 82562G Physical Layer Interface Device	29
1.10 Hardware Management Subsystem	31
1.10.1 Hardware Monitoring and Fan Control ASIC	31
1.10.2 Chassis Intrusion and Detection	31
1.10.3 Fan Monitoring	31
1.10.4 Thermal Monitoring	32
1.11 Power Management	33
1.11.1 ACPI	33
1.11.2 Hardware Support	35
2 Technical Reference	41
2.1 Memory Resources	41
2.1.1 Addressable Memory	41
2.1.2 Memory Map	43
2.2 DMA Channels	43
2.3 Fixed I/O Map	44
2.4 PCI Configuration Space Map	45
2.5 Interrupts	46
2.6 PCI Conventional Interrupt Routing Map	47
2.7 Connectors and Headers	48
2.7.1 Back Panel Connectors	49
2.7.2 Component-side Connectors and Headers	50
2.8 Jumper Block	58
2.9 Mechanical Considerations	60
2.9.1 Form Factor	60
2.9.2 I/O Shield	61
2.10 Electrical Considerations	62
2.10.1 DC Loading	62
2.10.2 Add-in Board Considerations	62
2.10.3 Fan Header Current Capability	63
2.10.4 Power Supply Considerations	63
2.11 Thermal Considerations	64
2.12 Reliability	66
2.13 Environmental	67
3 Overview of BIOS Features	69
3.1 Introduction	69
3.2 BIOS Flash Memory Organization	70
3.3 Resource Configuration	70
3.3.1 PCI Autoconfiguration	70
3.3.2 PCI IDE Support	71
3.4 System Management BIOS (SMBIOS)	71
3.5 BIOS Updates	72
3.5.1 Language Support	72
3.5.2 Custom Splash Screen	72
3.6 Legacy USB Support	73
3.7 Boot Options	73
3.7.1 CD-ROM Boot	73
3.7.2 Network Boot	73
3.7.3 Booting Without Attached Devices	74
3.7.4 Changing the Default Boot Device During POST	74
3.8 Adjusting Boot Speed	75
3.8.1 Peripheral Selection and Configuration	75
3.8.2 BIOS Boot Optimizations	75
3.9 BIOS Security Features	76
4 Error Messages and Beep Codes	77
4.1 Speaker	77
4.2 BIOS Beep Codes	77
4.3 BIOS Error Messages	77
4.4 Port 80h POST Codes	78
5 Regulatory Compliance and Battery Disposal Information	83
5.1 Regulatory Compliance	83
5.1.1 Safety Regulations	83
5.1.2 European Union Declaration of Conformity Statement	84
5.1.3 Product Ecology Statements	85
5.1.4 EMC Regulations	89
5.1.5 Product Certification Markings (Board Level)	90