Intel D945GCCR Product Specification - Page 7

Regulatory Compliance and Battery Disposal Information, s, Tables - audio

Get Intel D945GCCR PDF manuals and user guides View all Intel D945GCCR manuals
Add to My Manuals
Save this manual to your list of manuals

Page 7 highlights

Contents 5 Regulatory Compliance and Battery Disposal Information 5.1 Regulatory Compliance 83 5.1.1 Safety Regulations 83 5.1.2 European Union Declaration of Conformity Statement 84 5.1.3 Product Ecology Statements 85 5.1.4 EMC Regulations 89 5.1.5 Product Certification Markings (Board Level 90 5.2 Battery Disposal Information 91 Figures 1. Board Components 12 2. Block Diagram 14 3. Memory Channel and DIMM Configuration 18 4. Dual Channel (Interleaved) Mode Configuration with Two DIMMs 19 5. Single Channel (Asymmetric) Mode Configuration with One DIMM .......... 19 6. Single Channel (Asymmetric) Mode Configuration with Two DIMMs ......... 20 7. Front/Back Panel Audio Connector Options 28 8. LAN Connector LED Locations 30 9. Thermal Sensors and Fan Headers 32 10. Location of the Standby Power Indicator LED 39 11. Detailed System Memory Address Map 42 12. Back Panel Connectors 49 13. Component-side Connectors and Headers 50 14. Connection Diagram for Front Panel Header 55 15. Connection Diagram for Front Panel USB Headers 57 16. Location of the Jumper Block 58 17. Board Dimensions 60 18. I/O Shield Dimensions 61 19. Localized High Temperature Zones 65 Tables 1. Feature Summary 10 2. Board Components Shown in Figure 1 13 3. Supported Memory Configurations 16 4. Memory Operating Frequencies 17 5. LAN Connector LED States 30 6. Effects of Pressing the Power Switch 33 7. Power States and Targeted System Power 34 8. Wake-up Devices and Events 35 9. System Memory Map 43 10. DMA Channels 43 11. I/O Map 44 12. PCI Configuration Space Map 45 13. Interrupts 46 14. PCI Interrupt Routing Map 47 vii

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
Contents
vii
5
Regulatory Compliance and Battery Disposal Information
5.1
Regulatory Compliance
.....................................................................
83
5.1.1
Safety Regulations
................................................................
83
5.1.2
European Union Declaration of Conformity Statement
................
84
5.1.3
Product Ecology Statements
...................................................
85
5.1.4
EMC Regulations
..................................................................
89
5.1.5
Product Certification Markings (Board Level)
.............................
90
5.2
Battery Disposal Information
.............................................................
91
Figures
1.
Board Components
..........................................................................
12
2.
Block Diagram
................................................................................
14
3.
Memory Channel and DIMM Configuration
...........................................
18
4.
Dual Channel (Interleaved) Mode Configuration with Two DIMMs
............
19
5.
Single Channel (Asymmetric) Mode Configuration with One DIMM
..........
19
6.
Single Channel (Asymmetric) Mode Configuration with Two DIMMs
.........
20
7.
Front/Back Panel Audio Connector Options
..........................................
28
8.
LAN Connector LED Locations
............................................................
30
9.
Thermal Sensors and Fan Headers
.....................................................
32
10. Location of the Standby Power Indicator LED
.......................................
39
11. Detailed System Memory Address Map
...............................................
42
12. Back Panel Connectors
.....................................................................
49
13. Component-side Connectors and Headers
...........................................
50
14. Connection Diagram for Front Panel Header
........................................
55
15. Connection Diagram for Front Panel USB Headers
................................
57
16. Location of the Jumper Block
.............................................................
58
17. Board Dimensions
...........................................................................
60
18. I/O Shield Dimensions
......................................................................
61
19. Localized High Temperature Zones
.....................................................
65
Tables
1.
Feature Summary
............................................................................
10
2.
Board Components Shown in Figure 1
................................................
13
3.
Supported Memory Configurations
.....................................................
16
4.
Memory Operating Frequencies
.........................................................
17
5.
LAN Connector LED States
................................................................
30
6.
Effects of Pressing the Power Switch
..................................................
33
7.
Power States and Targeted System Power
...........................................
34
8.
Wake-up Devices and Events
............................................................
35
9.
System Memory Map
.......................................................................
43
10.
DMA Channels
.................................................................................
43
11.
I/O Map
.........................................................................................
44
12.
PCI Configuration Space Map
............................................................
45
13.
Interrupts
......................................................................................
46
14.
PCI Interrupt Routing Map
................................................................
47