Intel D945GCCR Product Specification - Page 82
Table 40. Typical Port 80h POST Sequence
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Intel Desktop Board D945GCCR Technical Product Specification Table 40. Typical Port 80h POST Sequence POST Code 21 22 23 25 28 34 E4 12 13 50 51 92 90 94 95 EB 58 5A 92 90 94 5A 28 90 94 E7 01 00 Description Initializing a chipset component Reading SPD from memory DIMMs Detecting presence of memory DIMMs Configuring memory Testing memory Loading recovery capsule Entered DXE phase Starting Application processor initialization SMM initialization Enumerating PCI busses Allocating resourced to PCI bus Detecting the presence of the keyboard Resetting keyboard Clearing keyboard input buffer Keyboard Self Test Calling Video BIOS Resetting USB bus Resetting PATA/SATA bus and all devices Detecting the presence of the keyboard Resetting keyboard Clearing keyboard input buffer Resetting PATA/SATA bus and all devices Testing memory Resetting keyboard Clearing keyboard input buffer Waiting for user input INT 19 Ready to boot 82
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