Intel DP43BF Intel Desktop Board DP43BFL Technical Product Specification - Page 23

Real-Time Clock Subsystem - replace cmos battery

Page 23 highlights

Product Description 1.6.3.2 SATA Interfaces The board provides five internal SATA connectors (black) through the MCH, which support one device per connector. The Intel ICH10 SATA controller provides independent SATA ports with a theoretical maximum transfer rate of 3 Gb/s per port. A point-to-point interface is used for host to device connections. For compatibility, the underlying SATA functionality is transparent to the operating system. The SATA controller supports IDE and AHCI (Microsoft Windows Vista* only) configuration and can operate in both legacy and native modes. In legacy mode, standard ATA I/O and IRQ resources are assigned (IRQ 14 and 15). In Native mode, standard Conventional PCI bus resource steering is used. Native mode is the preferred mode for configurations using the Windows* XP and Windows Vista operating systems. For information about Obtaining AHCI driver The location of the SATA connectors Refer to Section 1.3, page 16 Figure 10, page 44 1.7 Real-Time Clock Subsystem A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer is not plugged into a wall socket, the battery has an estimated life of three years. When the computer is plugged in, the standby current from the power supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied. NOTE If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS RAM at power-on. When the voltage drops below a certain level, the BIOS Setup program settings stored in CMOS RAM (for example, the date and time) might not be accurate. Replace the battery with an equivalent one. Figure 1 on page 13 shows the location of the battery. 23

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Product Description
23
1.6.3.2
SATA Interfaces
The board provides five internal SATA connectors (black) through the MCH, which
support one device per connector.
The Intel ICH10 SATA controller provides independent SATA ports with a theoretical
maximum transfer rate of 3 Gb/s per port.
A point-to-point interface is used for host
to device connections.
For compatibility, the underlying SATA functionality is transparent to the operating
system.
The SATA controller supports IDE and AHCI (Microsoft Windows Vista* only)
configuration and can operate in both legacy and native modes.
In legacy mode,
standard ATA I/O and IRQ resources are assigned (IRQ 14 and 15).
In Native mode,
standard Conventional PCI bus resource steering is used.
Native mode is the
preferred mode for configurations using the Windows* XP and Windows Vista
operating systems.
For information about
Refer to
Obtaining AHCI driver
Section 1.3, page 16
The location of the SATA connectors
Figure 10, page 44
1.7
Real-Time Clock Subsystem
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory.
When
the computer is not plugged into a wall socket, the battery has an estimated life of
three years.
When the computer is plugged in, the standby current from the power
supply extends the life of the battery.
The clock is accurate to
±
13 minutes/year at
25 ºC with 3.3 VSB applied.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded
into CMOS RAM at power-on.
When the voltage drops below a certain level, the BIOS Setup program settings stored
in CMOS RAM (for example, the date and time) might not be accurate.
Replace the
battery with an equivalent one.
Figure 1 on page 13 shows the location of the battery.