Intel DQ57TM Product Specification - Page 19

PCI Express x16 Graphics - driver

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Product Description 1.7.2 PCI Express x16 Graphics The Intel Core i7, Intel Core i5, Intel Core i3, Intel Pentium processors, and Intel Xeon processors 3400 series in an LGA1156 socket support discrete add in graphics cards through the PCI Express 2.0 x16 graphics connector: • Supports PCI Express GEN2 frequency of 2.5 GHz resulting in 5.0 Gb/s each direction (500 MB/s) per lane. Maximum theoretical bandwidth on interface is 8 GB/s in each direction, simultaneously, when operating in x16 mode. • Supports PCI Express GEN1 frequency of 1.25 GHz resulting in 2.5 Gb/s each direction (250 MB/s) per lane. Maximum theoretical bandwidth on interface is 4 GB/s in each direction, simultaneously, when operating in x16 mode. For information about PCI Express technology Refer to http://www.pcisig.com 1.8 USB The board supports up to fourteen USB 2.0 ports through two EHCI host controllers on the PCH that allow the use of EHCI-compatible drivers. The port arrangement is as follows: • Six ports are implemented with stacked back panel connectors • Eight front panel ports are implemented through four dual-port internal headers For information about The location of the USB connectors on the back panel The location of the front panel USB headers Refer to Figure 10, page 46 Figure 11, page 47 19

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Product Description
19
1.7.2
PCI Express x16 Graphics
The Intel Core i7, Intel Core i5, Intel Core i3, Intel Pentium processors, and Intel Xeon
processors 3400 series in an LGA1156 socket support discrete add in graphics cards
through the PCI Express 2.0 x16 graphics connector:
•
Supports PCI Express GEN2 frequency of 2.5 GHz resulting in 5.0 Gb/s each
direction (500 MB/s) per lane.
Maximum theoretical bandwidth on interface is
8 GB/s in each direction, simultaneously, when operating in x16 mode.
•
Supports PCI Express GEN1 frequency of 1.25 GHz resulting in 2.5 Gb/s each
direction (250 MB/s) per lane.
Maximum theoretical bandwidth on interface is
4 GB/s in each direction, simultaneously, when operating in x16 mode.
For information about
Refer to
PCI Express technology
1.8
USB
The board supports up to fourteen USB 2.0 ports through two EHCI host controllers on
the PCH that allow the use of EHCI-compatible drivers.
The port arrangement is as follows:
•
Six ports are implemented with stacked back panel connectors
•
Eight front panel ports are implemented through four dual-port internal headers
For information about
Refer to
The location of the USB connectors on the back panel
Figure 10, page 46
The location of the front panel USB headers
Figure 11, page 47