Intel E6320 Specification Update - Page 45

PCIe* Presence Detect State May Not be Accurate After a Warm Reset - drivers

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Page 45 highlights

 BJ81. Execution of BIST During Cold RESET Will Result in a Machine Check Shutdown Problem: If BIST (Built In Self-Test) is enabled and a Cold RESET follows, an unrecoverable machine check shutdown will occur. Implication: Due to this erratum, BIST cannot be enabled. Workaround: None identified. Status: For the steppings affected, see the Summary Tables of Changes. BJ82. PCI Express* Differential Peak-Peak Tx Voltage Swing May Violate the Specification Problem: Under certain conditions, including extreme voltage and temperature, the peak-peak voltage may be higher than the specification. Implication: Violation of PCI Express Base Specification of the VTX--DIFF-PP voltage. No failures have been observed due to this erratum. Workaround: None identified. Sugar Bay and Bromolow-WS Status: For the steppings affected, see the Summary Tables of Changes. BJ83. PCIe* Presence Detect State May Not be Accurate After a Warm Reset Problem: Under certain conditions, when there is no PCIe device present, the status of Presence Detect State bit (SLOTSTS Device 1; Function 0,1,2; Offset BAH; bit [6] and/or Device 6; Function 0; Offset BAH; bit [6]) may not be accurate after a warm reset. Implication: The Presence Detect State bit may incorrectly report a PCIe device is present even though no device is actually present, which may result in a system hang. Workaround: A BIOS code change has been identified and may be implemented as a workaround for this erratum. Status: For the steppings affected, see the Summary Tables of Changes. BJ84. Display Corruption May be Seen After Graphics Voltage Rail (VCC_AXG) Power Up Problem: Powering up the processor graphics logic in the cases of initial poweron or Sx resume state power up may cause a nondeterministic state in the processor graphics logic. Implication: This erratum may cause improper 3D rendering and may result in display corruption. Workaround: A graphics driver workaround has been identified and may be implemented as a workaround for this erratum. Status: For the steppings affected, see the Summary Tables of Changes. Specification Update 45

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Specification Update
45
BJ81.
Execution of BIST During Cold RESET Will Result in a Machine Check
Shutdown
Problem:
If BIST (Built In Self-Test) is enabled and a Cold RESET follows, an unrecoverable
machine check shutdown will occur.
Implication:
Due to this erratum, BIST cannot be enabled.
Workaround:
None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
BJ82.
PCI Express* Differential Peak-Peak Tx Voltage Swing May Violate the
Specification
Problem:
Under certain conditions, including extreme voltage and temperature, the peak-peak
voltage may be higher than the specification.
Implication:
Violation of PCI Express Base Specification of the VTX--DIFF-PP voltage. No failures
have been observed due to this erratum.
Workaround:
None identified. Sugar Bay and Bromolow-WS
Status:
For the steppings affected, see the Summary Tables of Changes.
BJ83.
PCIe* Presence Detect State May Not be Accurate After a Warm Reset
Problem:
Under certain conditions, when there is no PCIe device present, the status of Presence
Detect State bit (SLOTSTS Device 1; Function 0,1,2; Offset BAH; bit [6] and/or Device
6; Function 0; Offset BAH; bit [6]) may not be accurate after a warm reset.
Implication:
The Presence Detect State bit may incorrectly report a PCIe device is present even
though no device is actually present, which may result in a system hang.
Workaround:
A BIOS code change has been identified and may be implemented as a workaround for
this erratum.
Status:
For the steppings affected, see the Summary Tables of Changes.
BJ84.
Display Corruption May be Seen After Graphics Voltage Rail
(VCC_AXG) Power Up
Problem:
Powering up the processor graphics logic in the cases of initial poweron or Sx resume
state power up may cause a nondeterministic state in the processor graphics logic.
Implication:
This erratum may cause improper 3D rendering and may result in display corruption.
Workaround:
A graphics driver workaround has been identified and may be implemented as a
workaround for this erratum.
Status:
For the steppings affected, see the Summary Tables of Changes.