Intel SL8K2 Specification Update - Page 64

VM Exit Due to a MOV from CR8 May Cause an Unexpected Memory

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Errata R R100. VM Exit Due to a MOV from CR8 May Cause an Unexpected Memory Access Problem: In a system supporting Intel® Virtualization Technology and Intel® Extended Memory 64 Technology, if the "CR8-store exiting" bit in the processor-based VM-execution control field is set and the "use TPR shadow" bit is not set, a MOV from CR8 instruction executed by a Virtual Machine Extensions (VMX) guest that causes a VM exit may generate an unexpected memory access. Implication: When this erratum occurs, a read access to unexpected address may be issued to the chipset. Subsequent side effects are dependent on chipset operation and may include system hang. Workaround: It is possible for the BIOS to contain a workaround for this erratum. Status: For the steppings affected, see the Summary Tables of Changes. R101. The Processor May Incorrectly Respond to Machine Checks during VM Entry/Exit Transitions Problem: In systems supporting Intel® Virtualization Technology, when machine checks are encountered during VM entry/exit transitions, the processor is expected to respond with a VM exit (if a machine check occurs during VM entry) or abort (if a machine check occurs during VM exit). As a result of this erratum when machine checks occur during VM entry/exit transitions the processor will attempt to service the machine check which may lead to IERR-shutdown or execution of the Machine Check handler, dependent on the CR4.MCE setting. Implication: The system may end up in the shutdown state if CR4.MCE is not set. Workaround: None identified. Status: For the steppings affected, see the Summary Tables of Changes. R102. INIT during String Operations in the Virtual-Machine Extension (VMX) Guest Mode May Cause Unexpected System Behavior Problem: In a system supporting Intel® Virtualization Technology, if INIT occurs during REP LODS/MOVS/STOS/INS/OUTS while the processor is executing in VMX guest mode, after servicing the INIT, the host will resume at the next instruction and does not complete the remainder of string operation. Implication: This erratum may cause unexpected system behavior to occur. Workaround: It is possible for the BIOS to contain a workaround for this erratum. Status: For the steppings affected, see the Summary Tables of Changes. 64 Intel® Pentium® 4 Processor on 90 nm Process Specification Update

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Errata
R
64
Intel
®
Pentium
®
4 Processor on 90 nm Process Specification Update
R100.
VM Exit Due to a MOV from CR8 May Cause an Unexpected Memory
Access
Problem:
In a system supporting Intel
®
Virtualization Technology and Intel
®
Extended Memory 64
Technology, if the "CR8-store exiting" bit in the processor-based VM-execution control field is
set and the "use TPR shadow" bit is not set, a MOV from CR8 instruction executed by a Virtual
Machine Extensions (VMX) guest that causes a VM exit may generate an unexpected memory
access.
Implication:
When this erratum occurs, a read access to unexpected address may be issued to the chipset.
Subsequent side effects are dependent on chipset operation and may include system hang.
Workaround:
It is possible for the BIOS to contain a workaround for this erratum.
Status:
For the steppings affected, see the
Summary Tables of Changes.
R101.
The Processor May Incorrectly Respond to Machine Checks during VM
Entry/Exit Transitions
Problem:
In systems supporting Intel
®
Virtualization Technology, when machine checks are encountered
during VM entry/exit transitions, the processor is expected to respond with a VM exit (if a
machine check occurs during VM entry) or abort (if a machine check occurs during VM exit). As
a result of this erratum when machine checks occur during VM entry/exit transitions the processor
will attempt to service the machine check which may lead to IERR-shutdown or execution of the
Machine Check handler, dependent on the CR4.MCE setting.
Implication:
The system may end up in the shutdown state if CR4.MCE is not set.
Workaround:
None identified.
Status:
For the steppings affected, see the
Summary Tables of Changes.
R102.
INIT during String Operations in the Virtual-Machine Extension (VMX)
Guest Mode May Cause Unexpected System Behavior
Problem:
In a system supporting Intel
®
Virtualization Technology, if INIT occurs during REP
LODS/MOVS/STOS/INS/OUTS while the processor is executing in VMX guest mode, after
servicing the INIT, the host will resume at the next instruction and does not complete the
remainder of string operation.
Implication:
This erratum may cause unexpected system behavior to occur.
Workaround:
It is possible for the BIOS to contain a workaround for this erratum.
Status:
For the steppings affected, see the
Summary Tables of Changes.