Sony UP895 Service Manual - Page 33

Thermal Hysteresis, Strobe, Latch

Page 33 highlights

IC501 LINE MEMORY 12 12 LINE MEMORY 12 LINE 9 MEMORY THERMAL HYSTERESIS COMPENSATION 8 CALCULATION LINE MEMORY 8 16 16 LINE 16 LINE MEMORY MEMORY TEST PATTERN REGISTER TEST 6 PATTERN GENERATE INTERPOLATION CALCULATION 8 DITHER 6 TEST MODE SELECT 6 HEAD LINE MEMORY 6x20 PWM 20 COMP.x20 45 HDATA1 49 HDATA20 . 52 55 . 20 57 60 THERMAL . HEAD 62 68 GAMMA DATA REGISTER COMMON DROP COMPENSATION CALCULATION THERMAL HEAD CONTROL HCLK 69 STROBE 70 LATCH 73 UP-895/(E) 4-7

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4-7
UP-895/(E)
THERMAL HYSTERESIS
COMPENSATION
CALCULATION
LINE
MEMORY
8
INTERPOLATION
CALCULATION
8
DITHER
6
TEST MODE
SELECT
6
HEAD LINE
MEMORY
6
x
20
PWM
COMP.
x
20
THERMAL
HEAD
45
49
.
52
55
.
57
60
.
62
68
16
LINE
MEMORY
16
16
LINE
MEMORY
12
LINE
MEMORY
IC501
12
12
LINE
MEMORY
LINE
MEMORY
9
TEST
PATTERN
GENERATE
6
TEST
PATTERN
REGISTER
COMMON
DROP
COMPENSATION
CALCULATION
THERMAL
HEAD
CONTROL
GAMMA
DATA
REGISTER
8
20
20
69
70
73
HCLK
STROBE
LATCH
HDATA1
HDATA20