EVGA 123-YW-E175-A1 User Manual - Page 45

EVGA w Command Per Clock: This is the command timing setting on a per clock unit basis (options are 1T and 2T). w tRRD: RAS#-to-RAS# delay of different banks (options are 1 through 15). w tRC: RAS#-to-RAS# or auto refresh time of the same bank (options are 1 through 31). w tWR: The Write recovery time (options are 2 through 7). w tWTR: This is the minimum write-to-read delay with the same chip selected (options are 1 through 10). w tREF: This is the DRAM refresh rate (options are Auto, 7.8uS, and 3.9uS). ECC Control Disabled System Voltages Select System Voltages from the Frequency/Voltage Control menu and press Enter to display the System Voltages menu. Phoenix - AwardBIOS CMOS Setup Utility System Voltages Parameters CPU Core CPU FSB Memory nForce SPP NF200 Voltage Level Settings Current Value [Auto] 1.28 [Auto] 1.20V [Auto] 1.900V [Auto] 1.30V [Auto] 1.20V Item Help Main Level Voltage level for CPU Core (CPU VID) GTLVREF Lane 0 GTLVREF Lane 1 GTLVREF Lane 2 GTLVREF Lane 3 [Auto] +00mv [Auto] +00mv [Auto] +00mv [Auto] +00mv Users should exercise caution when over-voltaging, ,as it can cause system instability or even void warranties and damage components. :Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help F5: Previous Values F7:Defaults CPU Core Use the Page Up and Page Down keys to scroll through the voltages or select [Auto] to automatically set the voltage level for the CPU Core. CPU FSB Use the Page Up and Page Down keys to scroll through the voltages or select [Auto] to automatically set the voltage level for the CPU FSB. Memory This function defines the voltage level for the DRAM. Use the Page Up and Page Down keys to select a voltage or select [Auto] to automatically set the voltage.