EVGA 132-CK-NF78-TR User Manual - Page 60

Configuring the BIOS ¾ CPUOC 2% ¾ CPUOC 3% ¾ CPUOC 4% ¾ CPUOC 5% ¾ CPUOC MAX When you select one of the CPUOC x% options, the FSB - Memory Clock Mode is set to Unlinked and cannot be changed until SLIReady Memory is set to Disable. ‰ FSB and Memory Clock Mode Use the Page Up and Page Down keys to scroll through the FSB and Memory Clock Mode options. The options are: ¾ Auto This is the optimal setting since it sets the FSB and memory speeds automatically. ¾ Linked When Link is selected, FSB (QDR), MHz is changed to editable and the FSB speed can be entered manually. As the FSB speed is changed, CPU Freq, MHz changes proportionally. CPU Freq, MHz 2933.3 CPU Multiplier 11X FSB - Memory Clock Mode [Linked] FSB (QDR), MHz [1067] Actual FSB (QDR), MHz 1066.7 x MEM (DDR), MHz Auto Actual MEM (DDR), MHz 800.0 2933.3 11X 1066.7 800.6 ¾ Unlinked When Unlink is selected, FSB (QDR), MHz and MEM (DDR), MHz are changed to editable and the FSB and memory speeds can be entered manually. As the FSB speed is changed, CPU Freq, MHz changes proportionally. FSB - Memory Clock Mode [Linked] FSB (QDR), MHz [1067] Actual FSB (QDR), MHz 1066.7 MEM (DDR), MHz [1067] Actual MEM (DDR), MHz 800.0 1066.7 800.6