EVGA 132-YW-E178-A1 User Guide - Page 65

When you select one of the CPUOC x% options, the FSB - Memory Clock Mode is set to Unlinked and cannot be changed until SLI-Ready Memory is set to Disable. Please note when enabling SLI -Ready memory, timings and voltages will change automatically based on selection.  FSB and Memory Clock Mode Use the Page Up and Page Down keys to scroll through the FSB and Memory Clock Mode options. The options are:  Auto This is the optimal setting since it sets the FSB and memory speeds automatically.  Linked When Link is selected, FSB (QDR), MHz is changed to editable and the FSB speed can be entered manually. As the FSB speed is changed, CPU Freq, MHz changes proportionally. CPU Freq, MHz CPU Multiplier FSB - Memory Clock Mode FSB (QDR), MHz Actual FSB (QDR), MHz x MEM (DDR), MHz Actual MEM (DDR), MHz 2933.3 11X [Linked] [1067] 1066.7 Auto 800.0 2933.3 11X 1066.7 800.6  Unlinked When Unlink is selected, FSB (QDR), MHz and MEM (DDR), MHz are changed to editable and the FSB and memory speeds can be entered manually. As the FSB speed is changed, CPU Freq, MHz changes proportionally. FSB - Memory Clock Mode FSB (QDR), MHz Actual FSB (QDR), MHz MEM (DDR), MHz Actual MEM (DDR), MHz [Linked] [1067] 1066.7 [1067] 800.0 1066.7 800.6  FSB (QDR), MHz Use the + or - keys to scroll through new values for the CPU FSB frequency or type in a new value. Note that the Actual FSB (QDR) reflects the actual frequency that takes effect on a reboot.  MEM (DDR), MHz Use the + or - keys to scroll through new values for the memory frequency or type in a new value. Note that the Actual MEM (DDR) reflects the actual frequency that takes effect when the system reboots. EVGA 54