EVGA 132-YW-E178-A1 User Guide - Page 84

Table 7. NVMM POST Codes NVMM POST Codes Code 0F0h Name 0F1h 0F2h 0F3h 000h 001h 004h 008h 00Ch 010h 011h 012h 013h 014h 015h 016h 017h 018h 019h 01Ah 01Bh 01Ch 01Dh 020h 030h 040h 044h 048h 04Ch 050h 054h Description Identify HW in the system Register the slam tables Early SLAM table COM port initialization Initialize the hardware devices Override input parameters, etc. before QUERY Query the hardware devices Read SPD & fill in arrays ROM table pointer Initialize the Memory Controller Program the PLLs Query after memory PLL has been set Set Dynamic SPD values Load MemInfoStruct Load the DIMM geometry (using SPD) Prepare MRS variables Probe memory geometry PROD_C: PROD f/ Calculated ref manuals PROD_D: PROD w/ Discrete assembly programming PROD_E: PROD w/ Expandable criteria Send MRS/EMRS configuration cycles Overvoltage handling PROD_F: PROD Final - after MRS/EMRS PCI Express Initialization Load Spread Spectrum tables Set Top-Of-Memory registers Late SLAM table Previous Power State SLAM table Hardware Workarounds Restore, and exit NVMM Memory Test EVGA 73