Home » Intel Manuals » Motherboards » Intel DG965WH » Manual Viewer

Intel DG965WH Product Specification - Page 46

Fixed I/O Map

Get Intel DG965WH PDF manuals and user guides

Add to My Manuals
Save this manual to your list of manuals

Page 46 highlights

Intel Desktop Board DG965WH Technical Product Specification 2.3 Fixed I/O Map Table 13. I/O Map Address (hex) Size Description 0000 - 00FF 256 bytes 01F0 - 01F7 0228 - 022F (Note 1) 0278 - 027F (Note 1) 02E8 - 02EF (Note 1) 02F8 - 02FF (Note 1) 0378 - 037F 03B0 - 03BB 03C0 - 03DF 03E8 - 03EF 03F0 - 03F5 03F4 - 03F7 03F8 - 03FF 04D0 - 04D1 LPTn + 400 0CF8 - 0CFB (Note 2) 0CF9 (Note 3) 0CFC - 0CFF FFA0 - FFA7 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 12 bytes 32 bytes 8 bytes 6 bytes 4 bytes 8 bytes 2 bytes 8 bytes 4 bytes 1 byte 4 bytes 8 bytes Used by the Desktop Board DG965WH. Refer to the ICH8 data sheet for dynamic addressing information. Primary Parallel ATE IDE channel command block LPT3 LPT2 COM4 COM2 LPT1 Intel 82G965 GMCH Intel 82G965 GMCH COM3 Diskette channel Primary Parallel ATA IDE channel control block COM1 Edge/level triggered PIC ECP port, LPTn base address + 400h PCI configuration address register Reset control register PCI configuration data register Primary Parallel ATA IDE bus master registers Notes: 1. Default, but can be changed to another address range 2. Dword access only 3. Byte access only NOTE Some additional I/O addresses are not available due to ICH8 address aliassing. The ICH8 data sheet provides more information on address aliassing. For information about Obtaining the ICH8 data sheet Refer to Section 1.2 on page 15 46

Section	Page
Intel® Desktop Board DG965WH Technical Product Specification	1
Revision History / Disclaimer	2
Preface	3
Intended Audience	3
What This Document Contains	3
Typographical Conventions	3
Contents	5
1 Product Description	9
1.1 Overview	10
1.1.1 Feature Summary	10
1.1.2 Manufacturing Options	11
1.1.3 Board Layout	12
1.1.4 Block Diagram	14
1.2 Online Support	15
1.3 Processor	15
1.4 System Memory	16
1.4.1 Memory Configurations	17
1.5 Intel® G965 Express Chipset	23
1.5.1 Intel G965 Graphics Subsystem	23
1.5.2 USB	25
1.5.3 Serial ATA Interfaces	26
1.5.4 Parallel IDE Interface	27
1.5.5 Real-Time Clock, CMOS SRAM, and Battery	27
1.6 Legacy I/O Controller	28
1.6.1 Serial Port	28
1.6.2 Parallel Port	28
1.6.3 Diskette Drive Controller	28
1.6.4 Keyboard and Mouse Interface (Optional)	28
1.7 Audio Subsystem	29
1.7.1 Audio Subsystem Software	30
1.7.2 Audio Connectors and Headers	30
1.8 LAN Subsystem	31
1.8.1 Intel® 82566DC Gigabit Ethernet Controller	31
1.8.2 LAN Subsystem Software	32
1.8.3 RJ-45 LAN Connector with Integrated LEDs	32
1.9 Hardware Management Subsystem	33
1.9.1 Hardware Monitoring and Fan Control	33
1.9.2 Fan Monitoring	33
1.9.3 Chassis Intrusion and Detection	33
1.9.4 Thermal Monitoring	34
1.10 Power Management	35
1.10.1 ACPI	35
1.10.2 Hardware Support	37
2 Technical Reference	43
2.1 Memory Map	43
2.1.1 Addressable Memory	43
2.2 DMA Channels	45
2.3 Fixed I/O Map	46
2.4 PCI Configuration Space Map	47
2.5 Interrupts	48
2.6 DMA Channels	49
2.7 PCI Interrupt Routing Map	49
2.8 Connectors and Headers	50
2.8.1 Back Panel Connectors	51
2.8.2 Component-side Connectors and Headers	52
2.9 Jumper Block	60
2.10 Mechanical Considerations	61
2.10.1 Form Factor	61
2.10.2 I/O Shield	62
2.11 Electrical Considerations	64
2.11.1 DC Loading	64
2.11.2 Fan Header Current Capability	64
2.11.3 Add-in Board Considerations	65
2.11.4 Power Supply Considerations	65
2.12 Thermal Considerations	66
2.13 Reliability	68
2.14 Environmental	68
3 Overview of BIOS Features	69
3.1 Introduction	69
3.2 BIOS Flash Memory Organization	70
3.3 Resource Configuration	70
3.3.1 PCI Autoconfiguration	70
3.3.2 PCI IDE Support	71
3.4 System Management BIOS (SMBIOS)	71
3.5 Legacy USB Support	72
3.6 BIOS Updates	72
3.6.1 Language Support	73
3.6.2 Custom Splash Screen	73
3.7 BIOS Recovery	73
3.8 Boot Options	74
3.8.1 CD-ROM Boot	74
3.8.2 Network Boot	74
3.8.3 Booting Without Attached Devices	74
3.8.4 Changing the Default Boot Device During POST	74
3.9 Adjusting Boot Speed	75
3.9.1 Peripheral Selection and Configuration	75
3.9.2 BIOS Boot Optimizations	75
3.10 BIOS Security Features	76
4 Error Messages and Beep Codes	77
4.1 Speaker	77
4.2 BIOS Beep Codes	77
4.3 BIOS Error Messages	77
4.4 Port 80h POST Codes	78
5 Regulatory Compliance and Battery Disposal Information	83
5.1 Regulatory Compliance	83
5.1.1 Safety Regulations	83
5.1.2 European Union Declaration of Conformity Statement	84
5.1.3 Product Ecology Statements	86
5.1.4 EMC Regulations	89
5.1.5 Product Certification Markings (Board Level)	90

Match case Limit results 1 per page

Intel Desktop Board DG965WH Technical Product Specification

2.3

Fixed I/O Map

Table 13. I/O Map

Address (hex)

Size

Description

0000 - 00FF

256 bytes

Used by the Desktop Board DG965WH.

Refer to the ICH8

data sheet for dynamic addressing information.

01F0 - 01F7

8 bytes

Primary Parallel ATE IDE channel command block

0228 - 022F

(Note 1)

8 bytes

LPT3

0278 - 027F

(Note 1)

8 bytes

LPT2

02E8 - 02EF

(Note 1)

8 bytes

COM4

02F8 - 02FF

(Note 1)

8 bytes

COM2

0378 - 037F

8 bytes

LPT1

03B0 - 03BB

12 bytes

Intel 82G965 GMCH

03C0 - 03DF

32 bytes

Intel 82G965 GMCH

03E8 - 03EF

8 bytes

COM3

03F0 - 03F5

6 bytes

Diskette channel

03F4 - 03F7

4 bytes

Primary Parallel ATA IDE channel control block

03F8 - 03FF

8 bytes

COM1

04D0 - 04D1

2 bytes

Edge/level triggered PIC

LPTn + 400

8 bytes

ECP port, LPTn base address + 400h

0CF8 - 0CFB

(Note 2)

4 bytes

PCI configuration address register

0CF9

(Note 3)

1 byte

Reset control register

0CFC - 0CFF

4 bytes

PCI configuration data register

FFA0 - FFA7

8 bytes

Primary Parallel ATA IDE bus master registers

Notes:

Default, but can be changed to another address range

Dword access only

Byte access only

NOTE

Some additional I/O addresses are not available due to ICH8 address aliassing.

The

ICH8 data sheet provides more information on address aliassing.

For information about

Refer to

Obtaining the ICH8 data sheet

Section 1.2 on page 15