LG KU250 Service Manual - Page 49

External memory interface - specs

Get LG KU250 PDF manuals and user guides View all LG KU250 manuals
Add to My Manuals
Save this manual to your list of manuals

Page 49 highlights

3. TECHNICAL BRIEF 3.10 External memory interface The MSM6245 device was designed to provide two distinct memory interfaces. EBI1 was targeted for supporting high speed synchronous memory devices. EBI2 was targeted towards supporting slower asynchronous devices such as LCD, NAND flash, SDRAM, etc. • EBI1 Features - 16 bit static and dynamic memory interface - 32 bit dynamic memory interface - 24 bits of address for static memory devices which can support up to 32MBytes on each chip select - Synchronous burst memories supported (burst NOR, burst PSRAM) - Synchronous DRAM memories supported - Byte addressable memory supporting 8 bit, 16 bit and 32 bit accesses - Pseudo SRAM (PSRAM) memory support • EBI2 Features - Support for asynchronous FLASH and SRAM(16bit & 8bit). - Interface support for byte addressable 16bit devices (UB_N & LB_N signals). - Support for 8 bit/16bit wide NAND flash. - Support for parallel LCD interfaces, port mapped of memory mapped(18 or 16 bit). • 512Mb NAND(8bit) flash memory + 512Mb SDRAM (32bit) Device FLASH SDRAM Part Name HYC0UEH0MF3P HYC0UEH0MF3P Interface Spec Maker hynix hynix Read Access Time 60 ns 7 ns Write Access Time 60 ns 7 ns Table#1. External memory interface - 50 -

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128
  • 129
  • 130
  • 131
  • 132
  • 133
  • 134
  • 135
  • 136
  • 137
  • 138
  • 139
  • 140
  • 141
  • 142
  • 143
  • 144
  • 145
  • 146
  • 147
  • 148
  • 149
  • 150
  • 151
  • 152
  • 153
  • 154
  • 155
  • 156
  • 157
  • 158
  • 159
  • 160
  • 161
  • 162
  • 163
  • 164
  • 165
  • 166
  • 167
  • 168
  • 169
  • 170
  • 171
  • 172
  • 173
  • 174
  • 175
3.10 External memory interface
The MSM6245 device was designed to provide two distinct memory interfaces. EBI1 was targeted for
supporting high speed synchronous memory devices. EBI2 was targeted towards supporting slower
asynchronous devices such as LCD, NAND flash, SDRAM, etc.
•
EBI1 Features
- 16 bit static and dynamic memory interface
- 32 bit dynamic memory interface
- 24 bits of address for static memory devices which can support up to 32MBytes on each chip select
- Synchronous burst memories supported (burst NOR, burst PSRAM)
- Synchronous DRAM memories supported
- Byte addressable memory supporting 8 bit, 16 bit and 32 bit accesses
- Pseudo SRAM (PSRAM) memory support
•
EBI2 Features
- Support for asynchronous FLASH and SRAM(16bit & 8bit).
- Interface support for byte addressable 16bit devices (UB_N & LB_N signals).
- Support for 8 bit/16bit wide NAND flash.
- Support for parallel LCD interfaces, port mapped of memory mapped(18 or 16 bit).
•
512Mb NAND(8bit) flash memory + 512Mb SDRAM (32bit)
3. TECHNICAL BRIEF
- 50 -
Interface Spec
Device
Part Name
Maker
Read Access Time
Write Access Time
FLASH
HYC0UEH0MF3P
hynix
60 ns
60 ns
SDRAM
HYC0UEH0MF3P
hynix
7 ns
7 ns
Table#1. External memory interface