LG KU250 Service Manual - Page 59

Table. Interface between VGA Camera Module and MAIN PCB in camera module

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3. TECHNICAL BRIEF The VGA Camera module is connected to socket type connector with 20 pin (CLE9120-2761E). Its interface is dedicated camera interface port in MSM6245. The camera port supply 24.576MHz master clock to camera module and receive 12.288MHz pixel clock (15fps), vertical sync signal, horizontal sync signal, reset signal and 8bits data from camera module. The camera module is controlled by I2C port from MSM6245. No Name Port Note 1 VREG_CAM_DVDD_1.8V I DVDD 2 CAM_MCLK I Master Clock(24.576M) 3 GND GND GND 4 CAM_PCLK O Clock for Camera Data Out(12.288M) 5 CAM_DATA(0) O Data 6 CAM_DATA(1) O Data 7 CAM_DATA(2) O Data 8 CAM_DATA(3) O Data 9 CAM_DATA(4) O Data 10 CAM_DATA(5) O Data 11 CAM_DATA(6) O Data 12 CAM_DATA(7) O Data 13 CAM_VSYNC O Vertical Sync 14 CAM_HSYNC O Horizontal Sync 15 GND GND GND 16 I2C_SDA I I2C Data 17 I2C_SCL I I2C Clock 18 VGA_CAM_RESET_N I Camera reset signal 19 VREG_AVDD_2.8V I Camera I/O Power 20 VREG_AVDD_2.8V I Camera I/O Power Table. Interface between VGA Camera Module and MAIN PCB (in camera module) - 60 -

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3. TECHNICAL BRIEF
- 60 -
The VGA Camera module is connected to socket type connector with 20 pin (CLE9120-2761E). Its
interface is dedicated camera interface port in MSM6245. The camera port supply 24.576MHz master
clock to camera module and receive 12.288MHz pixel clock (15fps), vertical sync signal, horizontal
sync signal, reset signal and 8bits data from camera module.
The camera module is controlled by I2C port from MSM6245.
Camera I/O Power
I
VREG_AVDD_2.8V
20
Camera I/O Power
I
VREG_AVDD_2.8V
19
Camera reset signal
I
VGA_CAM_RESET_N
18
I2C Clock
I
I2C_SCL
17
GND
GND
GND
15
I2C Data
I
I2C_SDA
16
GND
GND
GND
3
Clock for Camera Data Out(12.288M)
O
CAM_PCLK
4
Data
O
CAM_DATA(0)
5
Data
O
CAM_DATA(1)
6
Data
O
CAM_DATA(2)
7
Data
O
CAM_DATA(3)
8
Data
O
CAM_DATA(4)
9
Data
O
CAM_DATA(5)
10
Horizontal Sync
O
CAM_HSYNC
14
Vertical Sync
O
CAM_VSYNC
13
Data
O
CAM_DATA(7)
12
Data
O
CAM_DATA(6)
11
Master Clock(24.576M)
I
CAM_MCLK
2
DVDD
I
VREG_CAM_DVDD_1.8V
1
Note
Port
Name
No
Table. Interface between VGA Camera Module and MAIN PCB (in camera module)