ASRock 4Core1333-Viiv User Manual - Page 56

3.3.2 Chipset Configuration BIOS SETUP UTILITY Advanced Chipset Configuration Memory Remap Feature [Disabled] DRAM Frequency [Auto] Flexibility Option [Disabled] Configure DRAM Timing by SPD [Enabled] DRAM CAS# Latency [Auto] Primary Graphics Adapter [PCI] OnBoard HD Audio Front Panel CD-In OnBoard Lan OnBoard 1394 [Auto] [Auto] [Enabled] [Enabled] [Enabled] VCCM Voltage VDDQ Voltage ICH8 Voltage [Auto] [Low] [Low] ENABLE: Allow remapping of overlapped PCI memory above the total physical memory. DISABLE: Do not allow remapping of memory. +F1 F9 F10 ESC Select Screen Select Item Change Option General Help Load Defaults Save and Exit Exit v02.54 (C) Copyright 1985-2005, American Megatrends, Inc. Memory Remap Feature Use this item to enable or disable memory remap feature. Configuration options: [Enabled] and [Disabled]. The default value is [Disabled]. DRAM Frequency If [Auto] is selected, the motherboard will detect the memory module(s) inserted and assigns appropriate frequency automatically. You may also select other value as operating frequency: [266MHz (DDRII533)], [333MHz (DDRII667)], [400MHz (DDRII800)]. Flexibility Option The default value of this option is [Disabled]. It will allow better tolerance for memory compatibility when it is set to [Enabled]. Configure DRAM Timing by SPD Select [Enabled] will configure the following items by the contents in the SPD (Serial Presence Detect) device. If you select [Disabled], you will find the items "DRAM RAS# to CAS# Delay", "DRAM RAS# Precharge", and "DRAM RAS# Activate to Precharge" appear to allow you adjusting them. DRAM CAS# Latency Use this item to adjust the means of memory accessing. DRAM RAS# to CAS# Delay This controls the latency between the DRAM active command and the read / write command. Configuration options: [2 DRAM Clocks], [3 DRAM Clocks], [4 DRAM Clocks], [5 DRAM Clocks], and [6 DRAM Clocks]. DRAM RAS# Precharge This controls the idle clocks after a precharge command is issued. Configuration options: [2 DRAM Clocks], [3 DRAM Clocks], [4 DRAM Clocks], [5 DRAM Clocks], and [6 DRAM Clocks]. 56