Asus E500-CI CUW-RM User Manual - Page 62

Chip Configuration

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4. BIOS SETUP 4.4.1 Chip Configuration 4. BIOS SETUP Chip Configuration SDRAM Configuration [By SPD] This sets the optimal timings for items 2-4, depending on the memory modules that you are using. Default setting is [By SPD], which configures items 2-4 by reading the contents in the SPD (Serial Presence Detect) device. The EEPROM on the memory module stores critical parameter information about the module, such as memory type, size, speed, voltage interface, and module banks. Configuration options: [User Define] [7ns (143MHz)] [8ns (125MHz)] [By SPD] SDRAM CAS Latency This controls the latency between the SDRAM read command and the time that the data actually becomes available. NOTE: To make changes to this field, the SDRAM Configuration field must be set to [User Define]. SDRAM RAS to CAS Delay This controls the latency between the SDRAM active command and the read/write command. NOTE: To make changes to this field, the SDRAM Configuration field must be set to [User Define]. 62 ASUS CUW-RM User's Manual

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ASUS CUW-RM User’s Manual
62
4. BIOS SETUP
4. BIOS SETUP
Chip Configuration
SDRAM Configuration [By SPD]
This sets the optimal timings for items 2–4, depending on the memory mod-
ules that you are using. Default setting is [By SPD], which configures items
2–4 by reading the contents in the SPD (Serial Presence Detect) device. The
EEPROM on the memory module stores critical parameter information about
the module, such as memory type, size, speed, voltage interface, and mod-
ule banks. Configuration options: [User Define] [7ns (143MHz)] [8ns
(125MHz)] [By SPD]
SDRAM CAS Latency
This controls the latency between the SDRAM read command and the time
that the data actually becomes available.
NOTE:
To make changes to this
field, the
SDRAM Configuration
field must be set to [User Define].
SDRAM RAS to CAS Delay
This controls the latency between the SDRAM active command and the
read/write command.
NOTE:
To make changes to this field, the
SDRAM
Configuration
field must be set to [User Define].
4.4.1 Chip Configuration