Asus P3V4X P3V4X User Manual - Page 60

Video Memory Cache Mode [UC], Onboard PCI IDE Enable [Both], Memory Hole At 15M-16M [Disabled]

Page 60 highlights

4. BIOS SETUP Video Memory Cache Mode [UC] USWC (uncacheable, speculative write combining) is a new cache technology for the video memory of the processor. It can greatly improve the display speed by caching the display data. You must set this to UC (uncacheable) if your display card cannot support this feature; otherwise your system may not boot. Configuration options: [UC] [USWC] Onboard PCI IDE Enable [Both] You can select to enable the primary IDE channel, secondary IDE channel, both, or disable both channels. Configuration options: [Both] [Primary] [Secondary] [Disabled] Memory Hole At 15M-16M [Disabled] This field allows you to reserve an address space for ISA expansion cards that require it. Configuration options: [Disabled] [Enabled] 4. BIOS SETUP Chip Configuration 60 ASUS P3V4X User's Manual

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ASUS P3V4X User’s Manual
60
4.
BIOS SETUP
4.
BIOS SETUP
Video Memory Cache Mode [UC]
USWC (uncacheable, speculative write combining) is a new cache technol-
ogy for the video memory of the processor. It can greatly improve the dis-
play speed by caching the display data. You must set this to UC (uncacheable)
if your display card cannot support this feature; otherwise your system may
not boot. Configuration options: [UC] [USWC]
Onboard PCI IDE Enable [Both]
You can select to enable the primary IDE channel, secondary IDE channel,
both, or disable both channels. Configuration options: [Both] [Primary] [Sec-
ondary] [Disabled]
Memory Hole At 15M-16M [Disabled]
This field allows you to reserve an address space for ISA expansion cards
that require it. Configuration options: [Disabled] [Enabled]
Chip Configuration