Asus TS500-E4 PX4 TS500-E4 - Page 116

Crystal Beach Configure Enable [Enabled] Allows you to enable or disable the Configuration/Memory mapped accesses to the Crystal Beach Configuration space located in Device 8, Fn 0, and Fn 1. Configuration options: [Disabled] [Enabled] SERR Signal Condition [Single Bit] Allows you to select the ECC error that the SERR# asserts. Configuration options: [None] [Single Bit] [Multiple Bit] [Both] Demand Scrub Enable [Enabled] Enables or disables the Demand Scrubbing. Configuration options: [Disabled] [Enabled] Patrol Scrub Enable [Enabled] Enables or disables the Patrol Scrubbing. Configuration options: [Disabled] [Enabled] 4GB PCI Hole Granularity [256 MB] Allows you to select the granularity of the PCI hole for PCI resource. Configuration options: [256 MB] [512 MB] [1.0 GB] [2.0 GB] Memory Branch Mode [Interleave] Allows you to select the memory branch mode. Configuration options: [Sequential] [Interleave] [Mirror] [Single channel 0] Branch 0 Rank Interleave [4:1] Allows you to select the Branch 0 Rank Interleave. Configuration options: [1:1] [2:1] [4:1] Branch 0 Rank Sparing [Disabled] Allows you to enable or disable the Branch 0 rank/DIMM Sparing feature. Configuration options: [Disabled] [Enabled] Enhanced x8 Detection [Enabled] Allows you to enable or disable the enhanced x8 DRAM UC error detection. Configuration options: [Disabled] [Enabled] Force ITK Config Clocking [Disabled] Allows you to enable or disable the FBD configuration for ITK test suite. Configuration options: [Disabled] [Enabled] FBDIMM(s) Thermal Throttling [Open Loop] Allows you to disable or set the thermal throttling control. Configuration options: [Open Loop] [Close Loop] [ASUS MemCool Fan] [Disabled] Open Loop Type [Best Performance] Allows you to select the Open Loop Type. Configuration options: [Best Performance] [Best Acoustic] [User Define] 5-22 Chapter 5: BIOS information