HP LH4r HP Netserver Service Handbook, Volume 3 - High-End - Page 68

IRQ Settings

Page 68 highlights

4 Processor Modules 1 Processor Module (min) Right Processor Carrier Board Processor Cage Locking Bar (4) Left Processor Carrier Board Both Cache Coherency Filters Installed (required for 8-way) J6A1 Jumper Block 8-Way Configuration Processor Baseboard Jumper Settings See the Service Technical Reference Label for the latest switch settings. Open = No Jumper Closed = Jumper 1 2 Reserved 34 56 78 9 10 11 12 13 14 15 16 Reserved (Default = Open/Disabled) Reserved (Default = Open/Enabled) Reserved (Default = Open/Enabled) Processor Speed (Bit 2) Processor Speed (Bit 3) Extra Jumper Stored Here 15 13 11 9 7 5 3 1 16 14 12 10 8 6 4 2 15 13 11 9 7 5 3 1 16 14 12 10 8 6 4 2 15 13 11 9 7 5 3 1 16 14 12 10 8 6 4 2 15 13 11 9 7 5 3 1 16 14 12 10 8 6 4 2 J61A Jumper Settings for 400 MHz Processors J61A Jumper Settings for 450 MHz Processors J61A Jumper Settings for 500 MHz Processors J61A Jumper Settings for 550 MHz Processors J6A1 Jumper Block Positions 400, 450, 500, and 550 MHz Processors (Processor Baseboard Jumper Block J6A1) IRQ Settings The hardware interrupts (IRQs) are automatically assigned for each PCI slot and embedded device in the NetServer. The automatic IRQ assignments are made by the BIOS during the boot process. Additional IRQs are required beyond the standard set of 15 since some accessory boards, like multi-port adapter boards, may require more than one IRQ per slot. A special hardware feature (APIC) eliminates interrupt conflicts by providing an expanded set of IRQs with up to four dedicated interrupts for each PCI slot. 62

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118

62
Both Cache Coherency
Filters Installed
(required for 8-way)
Processor Cage
Locking Bar (4)
Right Processor
Carrier Board
Left Processor
Carrier Board
4 Processor
Modules
1 Processor
Module (min)
J6A1 Jumper Block
8-Way Configuration
Processor Baseboard Jumper Settings
See the
Service Technical Reference Label
for the latest switch settings.
Processor Speed (Bit 2)
Processor Speed (Bit 3)
(Default = Open/Disabled)
(Default = Open/Enabled)
(Default = Open/Enabled)
Open = No Jumper
Closed = Jumper
Reserved
Reserved
Reserved
Reserved
1
2
3
5
7
9
11
13
16
14
12
10
8
6
4
15
Extra Jumper Stored Here
2
1
3
5
7
9
11
13
15
16
14
12
10
8
6
4
J61A Jumper
Settings for
500 MHz
Processors
J61A Jumper
Settings for
550 MHz
Processors
2
1
3
5
7
9
11
13
15
16
14
12
10
8
6
4
2
1
3
5
7
9
11
13
15
16
14
12
10
8
6
4
2
1
3
5
7
11
15
16
12
8
6
4
2
1
3
5
7
11
15
16
12
8
6
4
10
9
14
13
J61A Jumper
Settings for
450 MHz
Processors
2
1
3
5
7
11
15
16
12
8
6
4
2
1
3
5
7
11
15
16
12
8
6
4
10
9
14
13
J61A Jumper
Settings for
400 MHz
Processors
J6A1 Jumper Block Positions 400, 450, 500, and 550 MHz Processors (Processor Baseboard Jumper
Block J6A1)
IRQ Settings
The hardware interrupts (IRQs) are automatically assigned for each PCI slot and embedded device in the
NetServer. The automatic IRQ assignments are made by the BIOS during the boot process. Additional IRQs
are required beyond the standard set of 15 since some accessory boards, like multi-port adapter boards,
may require more than one IRQ per slot. A special hardware feature (APIC) eliminates interrupt conflicts by
providing an expanded set of IRQs with up to four dedicated interrupts for each PCI slot.