Intel 945G User Manual - Page 8

Intel® 945G Express Chipset Development Kit User's Manual About This Manual Term GMCH Host Intel® DVO Intel® ICH7 LCD LVDS MCH MEC PCI Express Primary PCI SDVO SDVO Device SMI UMA Description Graphics Memory Controller Hub. Component that contains the processor interface, DRAM controller, x16 PCI Express port (typically, the external graphics interface), and integrated graphics device (IGD). It communicates with the Intel® I/O Controller Hub 7 (ICH7) and other I/O controller hubs over the DMI interconnect. In this document GMCH refers to the Intel® 82945G GMCH component. This term is used synonymously with processor. Digital Video Out port. Term used for the first generation of Intel Graphics Controller's digital display channels. Digital display data is provided in a parallel format. This interface is not electrically compatible with the 2nd generation digital display channel discussed in this document - SDVO. Seventh generation I/O Controller Hub component that contains additional functionality compared to previous ICHs. The I/O Controller Hub component contains the primary PCI interface, LPC interface, USB2, ATA-100, and other I/O functions. It communicates with the (G)MCH over a proprietary interconnect called Direct Media Interface (DMI). Liquid Crystal Display. Low Voltage Differential Signaling. A high speed, low power data transmission standard used for display connections to LCD panels. Memory Controller Hub. Component that contains the processor interface, DRAM controller, and x16 PCI Express port (typically, the external graphics interface). It communicates with the I/O controller hub (ICH7) and other I/O controller hubs over the DMI interconnect. In this document MCH refers to the 82945P MCH component. Media Expansion Card, also known as ADD2+ card. Refer to ADD2+ term for description. Third Generation input/output graphics attach called PCI Express Graphics. PCI Express is a high-speed serial interface whose configuration is software compatible with the existing PCI specifications. The specific PCI Express implementation intended for connecting the (G)MCH to an external Graphics Controller is a x16 link and replaces AGP. The Primary PCI is the physical PCI bus that is driven directly by the ICH7 component. Communication between Primary PCI and the (G)MCH occurs over DMI. Note that the Primary PCI bus is not PCI Bus 0 from a configuration standpoint. Serial Digital Video Out. A digital display channel that serially transmits digital display data to an external SDVO device. The SDVO device accepts this serialized format and then translates the data into the appropriate display format (i.e., TMDS, LVDS, TV-Out). This interface is not electrically compatible with the previous digital display channel (DVO). For the 82945G GMCH, it will be multiplexed on a portion of the x16 graphics PCI Express interface. Third party codec that uses SDVO as an input. May have a variety of output formats, including DVI, LVDS, HDMI, TV-Out, etc. System Management Interrupt. SMI is used to indicate any of several system conditions (such as, thermal sensor events, throttling activated, access to System Management RAM, chassis open, or other system state related activity). Unified Memory Architecture. Describes an integrated graphics device using system memory for its frame buffers. 8 Reference #308823