Home » Intel Manuals » Motherboards » Intel D915GMH » Manual Viewer

Intel D915GMH Product Specification - Page 28

PCI Express Connectors - desktop board drivers

Get Intel D915GMH PDF manuals and user guides

Add to My Manuals
Save this manual to your list of manuals

Page 28 highlights

Intel Desktop Board D915GMH Technical Product Specification 1.7.3.4 RAID Boot Configuration Overview A RAID array can be created by using the existing Serial ATA ports, correctly configuring the BIOS, and installing drivers. The following steps are required to successfully establish a RAID configuration. 1. Enable RAID Support in BIOS. 2. Create a RAID array using the Intel Application Accelerator (IAA) utility. 3. Install the IAA RAID driver. 4. Format the RAID array. 5. Install the IAA Companion Utility (this step is optional). For information about Serial ATA RAID configuration Refer to http://developer.intel.com/design/motherbd/mh/index.htm 1.7.4 Real-Time Clock, CMOS SRAM, and Battery A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer is not plugged into a wall socket, the battery has an estimated life of three years. When the computer is plugged in, the standby current from the power supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied. ✏ NOTE If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS RAM at power-on. 1.8 PCI Express Connectors The board provides the following PCI Express connectors: • One PCI Express x16 connector supporting simultaneous transfer speeds up to 8 GBytes/sec • One PCI Express x1 connector. The x1 interface supports simultaneous transfer speeds up to 500 MBytes/sec The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the underlying PCI Express architecture is compatible with PCI Conventional compliant operating systems. Additional features of the PCI Express interface includes the following: • Support for the PCI Express enhanced configuration mechanism • Automatic discovery, link training, and initialization • Support for Active State Power Management (ASPM) • SMBus 2.0 support • Wake# signal supporting wake events from ACPI S1, S3, S4, or S5 • Software compatible with the PCI Power Management Event (PME) mechanism defined in the PCI Power Management Specification Rev. 1.1 28

Section	Page
Intel® Desktop Board D915GMH Technical Product Specification	1
Revision History	2
Preface	3
Intended Audience	3
What This Document Contains	3
Typographical Conventions	3
Other Common Notation	4
Contents	5
1 Product Description	11
1.1 PCI Bus Terminology Change	11
1.2 Power Connector Terminology Change	11
1.3 Overview	12
1.3.1 Feature Summary	12
1.3.2 Manufacturing Options	13
1.3.3 Board Layout	14
1.3.4 Block Diagram	16
1.4 Online Support	17
1.5 Processor	17
1.6 System Memory	18
1.6.1 Memory Configurations	20
1.7 Intel® 915G Chipset	24
1.7.1 Intel 915G Graphics Subsystem	24
1.7.2 USB	26
1.7.3 IDE Support	26
1.7.4 Real-Time Clock, CMOS SRAM, and Battery	28
1.8 PCI Express Connectors	28
1.9 I/O Controller	29
1.9.1 Serial Port	29
1.9.2 Parallel Port	29
1.9.3 Diskette Drive Controller	29
1.9.4 Keyboard and Mouse Interface	30
1.10 Audio Subsystem	30
1.10.1 Audio Subsystem Software	31
1.10.2 Audio Connectors	31
1.10.3 8-Channel (7.1) Audio Subsystem	32
1.10.4 6-Channel (5.1) Audio Subsystem	34
1.11 LAN Subsystem	35
1.11.1 10/100 Mbits/sec LAN Subsystem	35
1.11.2 Gigabit LAN Subsystem	36
1.11.3 Alert Standard Format (ASF) Support	37
1.11.4 LAN Subsystem Software	38
1.12 Hardware Management Subsystem	38
1.12.1 Hardware Monitoring and Fan Control ASIC	38
1.12.2 Thermal Monitoring	39
1.12.3 Fan Monitoring	40
1.12.4 Chassis Intrusion and Detection	40
1.13 Power Management	40
1.13.1 ACPI	40
1.13.2 Hardware Support	42
1.14 Trusted Platform Module (Optional)	46
1.14.1 System Requirements	46
1.14.2 Warning of Potential Data Loss	46
1.14.3 Security Precautions	47
1.14.4 Trusted Platform Module Ownership	48
1.14.5 Enabling the Trusted Platform Module	49
1.14.6 Assuming Trusted Platform Module Ownership	49
1.14.7 Recovery Procedures	50
1.14.8 Clearing Trusted Platform Module Ownership	51
1.14.9 Software Support	52
2 Technical Reference	53
2.1 Introduction	53
2.2 Memory Resources	53
2.2.1 Addressable Memory	53
2.2.2 Memory Map	55
2.3 DMA Channels	55
2.4 Fixed I/O Map	56
2.5 PCI Configuration Space Map	57
2.6 Interrupts	58
2.7 PCI Conventional Interrupt Routing Map	59
2.8 Connectors	60
2.8.1 Back Panel Connectors	60
2.8.2 Component-side Connectors	64
2.9 Jumper Block	72
2.10 Mechanical Considerations	73
2.10.1 Form Factor	73
2.10.2 I/O Shield	74
2.11 Electrical Considerations	76
2.11.1 DC Loading	76
2.11.2 Add-in Board Considerations	76
2.11.3 Fan Connector Current Capability	76
2.11.4 Power Supply Considerations	77
2.12 Thermal Considerations	77
2.13 Reliability	79
2.14 Environmental	80
2.15 Regulatory Compliance	81
2.15.1 Safety Regulations	81
2.15.2 EMC Regulations	81
2.15.3 European Union Declaration of Conformity Statement	82
2.15.4 Product Ecology Statements	83
2.15.5 Product Certification Markings (Board Level)	84
3 Overview of BIOS Features	85
3.1 Introduction	85
3.2 BIOS Flash Memory Organization	86
3.3 Resource Configuration	86
3.3.1 PCI Autoconfiguration	86
3.3.2 PCI IDE Support	86
3.4 System Management BIOS (SMBIOS)	87
3.5 Legacy USB Support	87
3.6 BIOS Updates	88
3.6.1 Language Support	88
3.6.2 Custom Splash Screen	88
3.7 Boot Options	89
3.7.1 CD-ROM Boot	89
3.7.2 Network Boot	89
3.7.3 Booting Without Attached Devices	89
3.7.4 Changing the Default Boot Device During POST	89
3.8 Fast Booting Systems with Intel® Rapid BIOS Boot	90
3.8.1 Peripheral Selection and Configuration	90
3.8.2 Intel® Rapid BIOS Boot Raid BIOS Boot	90
3.9 BIOS Security Features	91
4 Error Messages and Beep Codes	93
4.1 BIOS Error Messages	93
4.2 Port 80h POST Codes	95
4.3 Bus Initialization Checkpoints	99
4.4 Speaker	100

Match case Limit results 1 per page

Intel Desktop Board D915GMH Technical Product Specification

1.7.3.4

RAID Boot Configuration Overview

A RAID array can be created by using the existing Serial ATA ports, correctly configuring the

BIOS, and installing drivers.

The following steps are required to successfully establish a RAID

configuration.

Enable RAID Support in BIOS.

Create a RAID array using the Intel Application Accelerator (IAA) utility.

Install the IAA RAID driver.

Format the RAID array.

Install the IAA Companion Utility (this step is optional).

For information about

Refer to

Serial ATA RAID configuration

http://developer.intel.com/design/motherbd/mh/index.htm

1.7.4

Real-Time Clock, CMOS SRAM, and Battery

A coin-cell battery (CR2032) powers the real-time clock and CMOS memory.

When the computer

is not plugged into a wall socket, the battery has an estimated life of three years.

When the

computer is plugged in, the standby current from the power supply extends the life of the battery.

The clock is accurate to

13 minutes/year at 25 ºC with 3.3 VSB applied.

✏

NOTE

If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS

RAM at power-on.

1.8

PCI Express Connectors

The board provides the following PCI Express connectors:

•

One PCI Express x16 connector supporting simultaneous transfer speeds up to 8 GBytes/sec

•

One PCI Express x1 connector.

The x1 interface supports simultaneous transfer speeds up to

500 MBytes/sec

The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the

underlying PCI Express architecture is compatible with PCI Conventional compliant operating

systems.

Additional features of the PCI Express interface includes the following:

•

Support for the PCI Express enhanced configuration mechanism

•

Automatic discovery, link training, and initialization

•

Support for Active State Power Management (ASPM)

•

SMBus 2.0 support

•

Wake# signal supporting wake events from ACPI S1, S3, S4, or S5

•

Software compatible with the PCI Power Management Event (PME) mechanism defined in the

PCI Power Management Specification Rev. 1.1