Intel DQ965WC Product Specification - Page 48
Fixed I/O Map
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Intel Desktop Board DQ965WC Technical Product Specification 2.3 Fixed I/O Map Table 13. I/O Map Address (hex) 0000 - 00FF 0228 - 022F (Note 1) 0278 - 027F (Note 1) 02E8 - 02EF (Note 1) 02F8 - 02FF (Note 1) 0378 - 037F 03B0 - 03BB 03C0 - 03DF 03E8 - 03EF 03F8 - 03FF 04D0 - 04D1 LPTn + 400 0CF8 - 0CFB (Note 2) 0CF9 (Note 3) 0CFC - 0CFF Size 256 bytes 8 bytes 8 bytes 8 bytes 8 bytes 8 bytes 12 bytes 32 bytes 8 bytes 8 bytes 2 bytes 8 bytes 4 bytes 1 byte 4 bytes Description Used by the Desktop Board DQ965WC. Refer to the ICH8DO data sheet for dynamic addressing information. LPT3 LPT2 COM4 COM2 LPT1 Intel 82Q965 GMCH Intel 82Q965 GMCH COM3 COM1 Edge/level triggered PIC ECP port, LPTn base address + 400h PCI configuration address register Reset control register PCI configuration data register Notes: 1. Default, but can be changed to another address range 2. Dword access only 3. Byte access only NOTE Some additional I/O addresses are not available due to ICH8DO address aliasing. The ICH8DO data sheet provides more information on address aliasing. For information about Obtaining the ICH8DO data sheet Refer to Section 1.2 on page 15 48
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