Intel DQ965WC Product Specification - Page 7

Regulatory Compliance and Battery Disposal Information, s, Tables

Get Intel DQ965WC PDF manuals and user guides View all Intel DQ965WC manuals
Add to My Manuals
Save this manual to your list of manuals

Page 7 highlights

Contents 5 Regulatory Compliance and Battery Disposal Information 5.1 Regulatory Compliance 85 5.1.1 Safety Regulations 85 5.1.2 European Union Declaration of Conformity Statement 86 5.1.3 Product Ecology Statements 88 5.1.4 EMC Regulations 91 5.1.5 Product Certification Markings (Board Level 92 5.2 Battery Disposal Information 93 Figures 1. Major Board Components 12 2. Block Diagram 14 3. Memory Channel Configuration and DIMM Configuration 18 4. Dual Channel (Interleaved) Mode Configuration with Two DIMMs 19 5. Dual Channel (Interleaved) Mode Configuration with Three DIMMs ......... 19 6. Dual Channel (Interleaved) Mode Configuration with Four DIMMs 20 7. Single Channel (Asymmetric) Mode Configuration with One DIMM .......... 21 8. Single Channel (Asymmetric) Mode Configuration with Three DIMMs....... 21 9. Flex Mode Configuration with Two DIMMs 22 10. Front/Back Panel Audio Connector Options 31 11. LAN Connector LED Locations 33 12. Thermal Sensors and Fan Headers 36 13. Location of the Onboard Power Indicator LEDs 43 14. Detailed System Memory Address Map 46 15. Back Panel Connectors 53 16. Component-side Connectors and Headers 54 17. Connection Diagram for Front Panel Header 58 18. Connection Diagram for Front Panel USB Headers 60 19. Connection Diagram for IEEE 1394a Header 60 20. Location of the Jumper Block 61 21. Board Dimensions 62 22. I/O Shield Dimensions 63 23. Localized High Temperature Zones 67 Tables 1. Feature Summary 10 2. Board Components Shown in Figure 1 13 3. Supported Memory Configurations 16 4. Memory Operating Frequencies 17 5. DVI Port Status Conditions 27 6. Audio Jack Retasking Support 30 7. LAN Connector LED States 33 8. Effects of Pressing the Power Switch 37 9. Power States and Targeted System Power 38 vii

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
Contents
vii
5
Regulatory Compliance and Battery Disposal Information
5.1
Regulatory Compliance
.....................................................................
85
5.1.1
Safety Regulations
...............................................................
85
5.1.2
European Union Declaration of Conformity Statement
................
86
5.1.3
Product Ecology Statements
..................................................
88
5.1.4
EMC Regulations
..................................................................
91
5.1.5
Product Certification Markings (Board Level)
............................
92
5.2
Battery Disposal Information
.............................................................
93
Figures
1.
Major Board Components
.................................................................
12
2.
Block Diagram
................................................................................
14
3.
Memory Channel Configuration and DIMM Configuration
.......................
18
4.
Dual Channel (Interleaved) Mode Configuration with Two DIMMs
............
19
5.
Dual Channel (Interleaved) Mode Configuration with Three DIMMs
.........
19
6.
Dual Channel (Interleaved) Mode Configuration with Four DIMMs
...........
20
7.
Single Channel (Asymmetric) Mode Configuration with One DIMM
..........
21
8.
Single Channel (Asymmetric) Mode Configuration with Three DIMMs
.......
21
9.
Flex Mode Configuration with Two DIMMs
...........................................
22
10. Front/Back Panel Audio Connector Options
..........................................
31
11. LAN Connector LED Locations
............................................................
33
12. Thermal Sensors and Fan Headers
.....................................................
36
13. Location of the Onboard Power Indicator LEDs
.....................................
43
14. Detailed System Memory Address Map
...............................................
46
15. Back Panel Connectors
.....................................................................
53
16. Component-side Connectors and Headers
...........................................
54
17. Connection Diagram for Front Panel Header
........................................
58
18. Connection Diagram for Front Panel USB Headers
................................
60
19. Connection Diagram for IEEE 1394a Header
........................................
60
20. Location of the Jumper Block
............................................................
61
21. Board Dimensions
...........................................................................
62
22. I/O Shield Dimensions
......................................................................
63
23. Localized High Temperature Zones
.....................................................
67
Tables
1.
Feature Summary
............................................................................
10
2.
Board Components Shown in Figure 1
................................................
13
3.
Supported Memory Configurations
.....................................................
16
4.
Memory Operating Frequencies
.........................................................
17
5.
DVI Port Status Conditions
................................................................
27
6.
Audio Jack Retasking Support
...........................................................
30
7.
LAN Connector LED States
................................................................
33
8.
Effects of Pressing the Power Switch
..................................................
37
9.
Power States and Targeted System Power
..........................................
38