Intel QX9770 Design Guidelines - Page 32

LGA775 Socket Heatsink Loading

32

Thermal and Mechanical Design Guidelines

4.2.1

PROCHOT# Signal

The primary function of the PROCHOT# signal is to provide an external indication that

the processor has exceeded its maximum operating temperature.

While PROCHOT# is

asserted, the TCC will be active.

Assertion of the PROCHOT# signal is independent of

any register settings within the processor.

It is asserted any time the processor die

temperature reaches the trip point.

PROCHOT# can be configured via BIOS as an output or bi-directional signal.

As an

output, PROCHOT# will go active when the processor temperature of either core

exceeds its maximum operating temperature.

This indicates the TCC has been

activated.

As an input, assertion of PROCHOT# will activate the TCC for both cores.

The TCC will remain active until the system de-asserts PROCHOT#

The temperature at which the PROCHOT# signal goes active is individually calibrated

during manufacturing.

The power dissipation of each processor affects the set point

temperature.

The temperature where PROCHOT# goes active roughly parallels the

thermal profile.

Once configured, the processor temperature at which the PROCHOT#

signal is asserted is not re-configurable.

One application is the thermal protection of voltage regulators (VR).

System

designers can create a circuit to monitor the VR temperature and activate the TCC

when the temperature limit of the VR is reached.

By asserting PROCHOT# (pulled-

low) or FORCEPR#, which activates the TCC, the VR can cool down as a result of

reduced processor power consumption.

Bi-directional PROCHOT# can allow VR

thermal designs to target maximum sustained current instead of maximum current.

Systems should still provide proper cooling for the VR, and rely on bi-directional

PROCHOT# signal only as a backup in case of system cooling failure.

Note:

A thermal solution designed to meet the thermal profile targets should rarely

experience activation of the TCC as indicated by the PROCHOT# signal going active.

4.2.2

Thermal Control Circuit

The Thermal Control Circuit portion of the Thermal Monitor must be enabled for the

processor to operate within specifications.

The Thermal Monitor’s TCC, when active,

will attempt to lower the processor temperature by reducing the processor power

consumption.

In the original implementation of thermal monitor this is done by

changing the duty cycle of the internal processor clocks, resulting in a lower effective

frequency.

When active, the TCC turns the processor clocks off and then back on with

a predetermined duty cycle.

The duty cycle is processor specific, and is fixed for a

particular processor.

The maximum time period the clocks are disabled is ~3

μ

s.

This

time period is frequency dependent and higher frequency processors will disable the

internal clocks for a shorter time period.

Figure 8 illustrates the relationship between

the internal processor clocks and PROCHOT#.

Performance counter registers, status bits in model specific registers (MSRs), and the

PROCHOT# output pin are available to monitor the Thermal Monitor behavior.

Section	Page
1 Introduction	9
1.1 Document Goals and Scope	9
1.1.1 Importance of Thermal Management	9
1.1.2 Document Goals	9
1.1.3 Document Scope	10
1.2 References	11
1.3 Definition of Terms	11
2 Processor Thermal/Mechanical Information	13
2.1 Mechanical Requirements	13
2.1.1 Processor Package	13
2.1.2 Heatsink Attach	15
2.1.2.1 General Guidelines	15
2.1.2.2 The Pump Assembly Clip Load Requirement	15
2.1.2.3 Additional Guidelines	16
2.2 Thermal Requirements	16
2.2.1 Processor Case Temperature	16
2.2.2 Thermal Profile	17
2.2.3 TCONTROL	18
2.3 Heatsink Design Considerations	19
2.3.1 Heatsink Size	20
2.3.2 Package IHS Flatness	20
2.3.3 Thermal Interface Material	21
2.4 System Thermal Solution Considerations	21
2.4.1 Chassis Thermal Design Capabilities	21
2.4.2 Improving Chassis Thermal Performance	21
2.4.3 Summary	22
2.5 System Integration Considerations	22
3 Thermal Metrology	23
3.1 Characterizing Cooling Performance Requirements	23
3.1.1 Example	25
3.2 Processor Thermal Solution Performance Assessment	26
3.3 Local Ambient Temperature Measurement Guidelines	26
3.4 Processor Case Temperature Measurement Guidelines	29
4 Thermal Management Logic and Thermal Monitor Feature	31
4.1 Processor Power Dissipation	31
4.2 Thermal Monitor Implementation	31
4.2.1 PROCHOT# Signal	32
4.2.2 Thermal Control Circuit	32
4.2.3 Thermal Monitor 2	33
4.2.4 Operation and Configuration	34
4.2.5 On-Demand Mode	35
4.2.6 System Considerations	35
4.2.7 Operating System and Application Software Considerations	36
4.2.8 THERMTRIP# Signal	36
4.2.9 Cooling System Failure Warning	36
4.2.10 Digital Thermal Sensor	37
4.2.11 Platform Environmental Control Interface (PECI)	38
5 Intel Thermal/Mechanical Reference Design Information	39
5.1 Validation Results for the ATX Reference Design	39
5.1.1 Heatsink Performance	40
5.1.2 Acoustics	40
5.1.3 Altitude	41
5.1.4 Reference Heatsink Thermal Validation	41
5.1.5 Fan Motor Performance	42
5.1.6 Pump Motor Performance	43
5.2 Environmental Reliability Testing	44
5.2.1 Structural Reliability Testing	44
5.2.1.1 Random Vibration Test Procedure	44
5.2.1.2 Shock Test Procedure	45
5.2.2 Power Cycling	46
5.2.3 Reliability Testing	46
5.2.3.1 Tubing Material Selection	48
5.2.3.2 Reservoir Sizing	48
5.2.3.3 Reliability Test Results	50
5.2.4 Recommended BIOS/CPU/Memory Test Procedures	51
5.3 Material and Recycling Requirements	52
5.4 Safety Requirements	52
5.5 Geometric Envelope for Intel Reference ATX Thermal Mechanical Design	52
5.6 Reference Attach Mechanism	54
5.7 Socket and Voltage Regulation Cooling Strategy	55
6 Intel® Quiet System Technology (Intel® QST)	57
6.1 Intel® Quiet System Technology Algorithm	57
6.1.1 Output Weighting Matrix	58
6.1.2 Proportional-Integral-Derivative (PID)	58
6.2 Board and System Implementation of Intel® Quiet System Technology	60
6.3 Intel® QST Configuration & Tuning	62

Intel QX9770 Design Guidelines - Page 32

PROCHOT# Signal, 4.2.2 Thermal Control Circuit, The Thermal Monitor's TCC, when active

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