Intel S5500HV Product Specification - Page 24

Intel® Server Board S5500HV/Intel® Server System SR1670HV TPS Functional Architecture ƒ The memory slots associated with a given processor are unavailable if the given processor socket is not populated. ƒ A processor may be installed without populating the associated memory slots provided a second processor is installed with associated memory. In this case, the memory is shared by the processors. However, this is not a recommended configuration due to the associated latency which will affect performance. ƒ Processor sockets are self-contained and autonomous. However, all memory subsystem support (i.e., Memory RAS, Error Management, etc.) in the BIOS setup are applied commonly across processor sockets. 3.2.1.1 Memory Population Rules DIMM population requirements are dependent upon the number of slots per channel; the number of DIMMs installed; and rank type. When installing memory consider the following: ƒ Populate DIMMs by channel starting with the Blue slot farthest from the CPU ƒ All channels in a system will run at the fastest common frequency ƒ RDIMMs and UDIMMs may not be mixed ƒ If two 1333 MHz capable UDIMMs or RDIMMs is detected in the same channel, BIOS will flag this as a warning and force the speed down to 1066 MHz. 3.2.1.1.1 Supported RDIMM configurations: Table 3 Supported RDIMM configurations DIMM Slots per Channel 2 DIMMs Populated per Channel 1 DIMM Type Registered DDR3 ECC Speeds 800, 1066, 1333 Ranks per DIMM SR or DR Population Rules 1. Any combination of x4 and x8 RDIMMs, with 1Gb or 2Gb DRAM density 2 1 Registered 800, 1066 QR Only DDR3 ECC 2 2 Registered 800, 1066 Mixing SR, DDR3 ECC DR 2 2 Registered 800 Mixing SR, DDR3 ECC DR, QR ƒ 256 Mb, 512 Mb and 4 Gb DRAM technologies and x16 DRAM on RDIMM are NOT supported ƒ If a quad rank RDIMM is mixed with a single rank or dual rank DIMM on given channel, the quad rank DIMM must be populated in the lowest numbered slot. 15 Intel Confidential Revision 1.2 Intel order number E69391-006