Sharp TM200 Service Manual - Page 76

CONFIDENTIAL Q IC702 VHITK11131C-1R (TK11131C): REGULATOR Pin Terminal Input/ No. name Output Description of terminal 1 CONT Input Control 2 GND - Ground 3 NP Input Capacitor (Vref) Pin Terminal No. name 18 GND 19 VDDCORE 20 PWM0/PORT3 Input/ Output Description of terminal - Logic ground - CORE Power supply 1.8 V (1.6 V~ 2.0 V) Output PWM output 0 General-purpose PORT output (default) 4 VOUT 5 VIN Output Output Input Input VIN 5 VOUT 4 21 SUBCS_B 22 CS_B 23 VDDIO 24 LCDINT Input/ Chip select signal for External display Output Input/ Device select signal (Display is Output active when CS_B is "Low") - IO Power supply 3.0 V (2.7 V~ 3.3 V) Output External interrupt signal (Starting varies when interruption occurs.) Control Circuit Over Heat & Over Current Protection 25 GTDIO_B 26 VDDIO Output MPEG4ASIC internal core powercut signal ("Low" is active.) - IO Power supply 3.0 V (2.7 V~ 3.3 V) 27 SUBDB1 Input/ Data bus for External display Output 320K -+ 28 BDATA[5] (B5) Output Display panel B output signa 29 BDATA[5] (B4) Output Display panel B output signa 500K Bandgap Reference 30 BDATA[5] (B3) Output Display panel B output signa 31 GND - Logic ground 1 CONT 2 GND 32 TESTI Input Test terminal (Connected to GND normally) 3 NP 33 BSHS_B Input/ External Bit Stream horizontal Output synchronization signal ("Low" is active) 34 WR_B Input/ Host write strobe signal Output Q IC704 (LR38863): DISPLAY CONTROLLER 35 SUBRS Input/ Data determination signal for Output External display Pin Terminal Input/ No. name Output Description of terminal 1 DUMMY4 - Dummy 4 2 VDDPLL - PLL Power supply 1.8 V (1.6 V~ 2.0 V) 3 PLLGND - PLL Ground 4 PLLDIV0 Input PLL multiply switching signal 5 PLLDIV1 Input PLL multiply switching signal 6 HSD0 Input/ Data bus for high-speed serial transfer Output 7 HSD1 Input/ Data bus for high-speed serial transfer Output 8 HSD2 Input/ Data bus for high-speed serial transfer Output 9 HSWRD Input/ Read/Write determination signal for Output high-speed serial transfer 10 HSEN Input/ High-speed serial data effective Output signal High is active 11 HSCK Input/ Standard clock for high-speed Output serial transfer (5 to 33 MHz) 12 DUMMY3 - Dummy 3 13 PWM1/PORT8 Output PWM output 1 General-purpose PORT output (default) (Not used) 14 PLLDIV2 Input PLL multiply switching signal 15 VDDCORE - CORE Power supply 1.8 V (1.6 V~ 2.0 V) 16 GND - Logic ground 17 SUBWR_B Input/ Light signal for External display Output 36 MP4 RESET_B Output MPEG4ASIC reset control signal ("Low" is active) 37 HSD6 Input/ Data bus for high-speed serial transfer Output 38 BDATA[2] (B2) Output Display panel B output signal 39 BDATA[2] (B1) Output Display panel B output signal 40 BDATA[2] (B0) 41* EXCS_B1 Output Display panel B output signal Input/ Chip select output 1 (internal Output decode output) (Not used) 42* XOUT Output Oscillation circuit output (Not used) 43 VDDIO - IO Power supply 3.0 V (2.7 V~ 3.3 V) 44 GND - Logic ground 45 SCANEN Input Full scan effective signal "High" is active (Connected to GND normally) 46 RD_B Input/ Host read strobe signal Output 47 RSP Input/ Register selection signal Output HOST_IF section : RSP =Low...Display access RSP = High...Control access Hyper_Serial section : RSP = Low...Control acces RSP = High...Display access 48 GND - Logic ground 49 HSD3 Input/ Data bus for high-speed serial transfer Output 50 DCLK Input/ Data sampling clock (display clock) Output TM200 OTHERS 6 - 11