Sony HCD-DH7BT Service Manual - Page 72

USB BOARD, IC951, TC94A70FG-007 S, D MP3 PROCESSOR, Pin No., Pin Name, Description

Page 72 highlights

TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299 HCD-DH3/DH5BT/DH7BT http://www.xiaoyu163.com QQ 376315150 USB BOARD IC951 TC94A70FG-007 (S, D) (MP3 PROCESSOR) Pin No. Pin Name I/O 892498299 Description 1 AVSS3 - Ground terminal 2 RFZi I RF ripple zero crossing signal input terminal Not used 3 RFRP O RF ripple signal output terminal Not used 4 SBAD/RFDC O Sub beam addition signal or RF peak detection signal output terminal Not used 5 FEi O Focus error signal output terminal Not used 6 TEi O Tracking error signal output terminal Not used 7 TEZi I Tracking error zero crossing signal input terminal Not used 8 AVDD3 - Power supply terminal (+3.3 V) 9 FOo O Focus coil drive signal output terminal Not used 10 TRo O Tracking coil drive signal output terminal Not used 11 VREF I Reference voltage (+1.65V) input terminal Not used 12 FMO O Sled motor drive signal output terminal Not used 13 DMO O Spindle motor drive signal output terminal Not used 14 VSSP3 - Ground terminal 15 VCOi I VCO control voltage input terminal 16 VDDP3 - Power supply terminal (+3.3 V) 17 VDD1 - Power supply terminal (+1.5 V) 18 VSS - Ground terminal 19 FGiN I FG signal input terminal Not used 20 IO0 (/HSO) I Not used TEL 13942296513 21 IO1 (/UHSO) O Not used 22 XVSS3 - Ground terminal QQ 376315150 892498299 23 XI I System clock input terminal (16.9344 MHz) 24 XO O System clock output terminal (16.9344 MHz) 25 XVDD3 - Power supply terminal (+3.3 V) 26 DVSS3 - Ground terminal 27 RO O Audio data (R-ch) output to the input selector 28 DVDD3 - Power supply terminal (+3.3 V) 29 DVR O Reference voltage (+1.65V) output terminal 30 LO O Audio data (L-ch) output to the input selector 31 DVSS3 - Ground terminal 32 VDDT3 - Power supply terminal (+3.3 V) 33 VSS1 - Ground terminal 34 VDD1 - Power supply terminal (+1.5 V) 35 VDDM1 - Power supply terminal (+1.5 V) 36 SRAMSTB I S-RAM standby mode control signal input terminal Fixed at "L" in this set 37 XRST I Reset signal input from the USB controller "L": reset 38, 39 BUS0, BUS1 I Serial data input from the USB controller 40 BUS2 (SO) I Serial data input from the USB controller 41 BUS3 (SI) I Serial data input from the USB controller 42 BUCK (CLK) I Serial data transfer clock signal input from the USB controller 43 XCCE www 44 TEST 45 IRQ 46 . AoUT3 (PO4) 47 AoUT2 (PO5) I Chip enable signal input from the USB controller I Setting terminal for test mode Normally fixed at "L" xiaoy u163. I Interrupt request signal input terminal Not used O Request signal output to the USB controller O Audio data output terminal Not used com 72 http://www.xiaoyu163.com

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72
HCD-DH3/DH5BT/DH7BT
USB BOARD
IC951
TC94A70FG-007 (S, D) (MP3 PROCESSOR)
Pin No.
Pin Name
I/O
Description
1
AVSS3
-
Ground terminal
2
RFZi
I
RF ripple zero crossing signal input terminal
Not used
3
RFRP
O
RF ripple signal output terminal
Not used
4
SBAD/RFDC
O
Sub beam addition signal or RF peak detection signal output terminal
Not used
5
FEi
O
Focus error signal output terminal
Not used
6
TEi
O
Tracking error signal output terminal
Not used
7
TEZi
I
Tracking error zero crossing signal input terminal
Not used
8
AVDD3
-
Power supply terminal (+3.3 V)
9
FOo
O
Focus coil drive signal output terminal
Not used
10
TRo
O
Tracking coil drive signal output terminal
Not used
11
VREF
I
Reference voltage (+1.65V) input terminal
Not used
12
FMO
O
Sled motor drive signal output terminal
Not used
13
DMO
O
Spindle motor drive signal output terminal
Not used
14
VSSP3
-
Ground terminal
15
VCOi
I
VCO control voltage input terminal
16
VDDP3
-
Power supply terminal (+3.3 V)
17
VDD1
-
Power supply terminal (+1.5 V)
18
VSS
-
Ground terminal
19
FGiN
I
FG signal input terminal
Not used
20
IO0 (/HSO)
I
Not used
21
IO1 (/UHSO)
O
Not used
22
XVSS3
-
Ground terminal
23
XI
I
System clock input terminal (16.9344 MHz)
24
XO
O
System clock output terminal (16.9344 MHz)
25
XVDD3
-
Power supply terminal (+3.3 V)
26
DVSS3
-
Ground terminal
27
RO
O
Audio data (R-ch) output to the input selector
28
DVDD3
-
Power supply terminal (+3.3 V)
29
DVR
O
Reference voltage (+1.65V) output terminal
30
LO
O
Audio data (L-ch) output to the input selector
31
DVSS3
-
Ground terminal
32
VDDT3
-
Power supply terminal (+3.3 V)
33
VSS1
-
Ground terminal
34
VDD1
-
Power supply terminal (+1.5 V)
35
VDDM1
-
Power supply terminal (+1.5 V)
36
SRAMSTB
I
S-RAM standby mode control signal input terminal
Fixed at "L" in this set
37
XRST
I
Reset signal
input from the USB controller
"L": reset
38, 39
BUS0, BUS1
I
Serial data input from the USB controller
40
BUS2 (SO)
I
Serial data input from the USB controller
41
BUS3 (SI)
I
Serial data input from the USB controller
42
BUCK (CLK)
I
Serial data transfer clock signal input from the USB controller
43
XCCE
I
Chip enable signal input from the USB controller
44
TEST
I
Setting terminal for test mode
Normally fixed at "L"
45
IRQ
I
Interrupt request signal input terminal
Not used
46
AoUT3 (PO4)
O
Request signal output to the USB controller
47
AoUT2 (PO5)
O
Audio data output terminal
Not used