Sony STR-DB1070 Service Manual - Page 46

Pin No., Pin Name, Description

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Page 46 highlights

STR-DB870/DB1070 Pin No. Pin Name I/O 49 WMD0 I 50 PAGE2 O 51 VSS - 52, 53 PAGE1, PAGE0 O 54 BOOT I 55 BTACT O 56 BST I 57 MOD1 I 58 MOD0 I 59 EXLOCK I 60 VDDI - 61 VSS - 62, 63 A17, A16 O 64 to 66 A15 to A13 O 67 GP10 I 68 GP9 O 69 GP8 I 70 VDDI - 71 VSS - 72 to 75 D15/GP7 to D12/GP4 I/O 76 VDDE - 77 to 80 D11/GP3 to D8/GP0 I/O 81 VSS - 82 to 85 A9, A12 to A10 O 86 TDO O 87 TMS I 88 XTRST I 89 TCK I 90 TDI I 91 VSS - 92 to 97 A8 to A3 O 98, 99 D7, D6 I/O 100 VDDI - 101 VSS - 102 to 105 D5 to D2 I/O 106 VDDE - 107, 108 D1, D0 I/O 109, 110 A2, A1 O 111 VSS - 112 A0 O 113 PM I 114 SDI3, SDI4 I 116 SYNC I 117 to 119 VSS - 120 VDDI - Description External memory wait mode setting terminal (fixed at "H") External memory page select signal output terminal Not used (open) Ground terminal External memory page select signal output terminal Not used (open) Boot mode control signal input terminal Not used (fixed at "L") Boot mode display signal output terminal Not used (open) Boot strap signal input from the system contorller (IC1703) Mode select signal input terminal "L": 384fs, "H": 256fs Mode select signal input terminal "L": single chip mode, "H": can not use Error lock signal input from the digital audio interface receiver (IC1408) Power supply terminal (+2.5V) Ground terminal Address signal output terminal Not used (open) Address signal output to the S-RAM (IC1502) Serial clock input from the audio DSP2 (IC1601) Signal output to the system controller (IC1703) Audio transfer signal output to the digital audio inteface receiver (IC1408) Power supply terminal (+2.5V) Ground terminal Two-way data bus with the S-RAM (IC1502) Power supply terminal (+3.3V) Two-way data bus with the S-RAM (IC1502) Ground terminal Address signal output to the S-RAM (IC1502) Emulation data output terminal Not used (open) Emulation data input start/end select terminal Not used (open) Emulation break signal input terminal Not used (open) Emulation clock signal input terminal Not used (open) Emulation data input terminal Not used (open) Ground terminal Address signal output to the S-RAM (IC1502) Two-way data bus with the S-RAM (IC1502) Power supply terminal (+2.5V) Ground terminal Two-way data bus with the S-RAM (IC1502) Power supply terminal (+3.3V) Two-way data bus with the S-RAM (IC1502) Address signal output to the S-RAM (IC1502) Ground terminal Address signal output to the S-RAM (IC1502) PLL initialize signal input from the system controller (IC1703) Audio serial data input data terminal Not used (open) Sync/unsync select signal input terminal "L": sync (fixed at "H") Ground terminal Power supply terminal (+2.5V) 46

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46
STR-DB870/DB1070
Pin No.
Pin Name
I/O
Description
49
WMD0
I
External memory wait mode setting terminal (fixed at “H”)
50
PAGE2
O
External memory page select signal output terminal
Not used (open)
51
VSS
—
Ground terminal
52, 53
PAGE1, PAGE0
O
External memory page select signal output terminal
Not used (open)
54
BOOT
I
Boot mode control signal input terminal
Not used (fixed at “L”)
55
BTACT
O
Boot mode display signal output terminal
Not used (open)
56
BST
I
Boot strap signal input from the system contorller (IC1703)
57
MOD1
I
Mode select signal input terminal
“L”: 384fs, “H”: 256fs
58
MOD0
I
Mode select signal input terminal
“L”: single chip mode, “H”: can not use
59
EXLOCK
I
Error lock signal input from the digital audio interface receiver (IC1408)
60
VDDI
—
Power supply terminal (+2.5V)
61
VSS
—
Ground terminal
62, 63
A17, A16
O
Address signal output terminal
Not used (open)
64 to 66
A15 to A13
O
Address signal output to the S-RAM (IC1502)
67
GP10
I
Serial clock input from the audio DSP2 (IC1601)
68
GP9
O
Signal output to the system controller (IC1703)
69
GP8
I
Audio transfer signal output to the digital audio inteface receiver (IC1408)
70
VDDI
—
Power supply terminal (+2.5V)
71
VSS
—
Ground terminal
72 to 75
D15/GP7 to D12/GP4
I/O
Two-way data bus with the S-RAM (IC1502)
76
VDDE
—
Power supply terminal (+3.3V)
77 to 80
D11/GP3 to D8/GP0
I/O
Two-way data bus with the S-RAM (IC1502)
81
VSS
—
Ground terminal
82 to 85
A9, A12 to A10
O
Address signal output to the S-RAM (IC1502)
86
TDO
O
Emulation data output terminal
Not used (open)
87
TMS
I
Emulation data input start/end select terminal
Not used (open)
88
XTRST
I
Emulation break signal input terminal
Not used (open)
89
TCK
I
Emulation clock signal input terminal
Not used (open)
90
TDI
I
Emulation data input terminal
Not used (open)
91
VSS
—
Ground terminal
92 to 97
A8 to A3
O
Address signal output to the S-RAM (IC1502)
98, 99
D7, D6
I/O
Two-way data bus with the S-RAM (IC1502)
100
VDDI
—
Power supply terminal (+2.5V)
101
VSS
—
Ground terminal
102 to 105
D5 to D2
I/O
Two-way data bus with the S-RAM (IC1502)
106
VDDE
—
Power supply terminal (+3.3V)
107, 108
D1, D0
I/O
Two-way data bus with the S-RAM (IC1502)
109, 110
A2, A1
O
Address signal output to the S-RAM (IC1502)
111
VSS
—
Ground terminal
112
A0
O
Address signal output to the S-RAM (IC1502)
113
PM
I
PLL initialize signal input from the system controller (IC1703)
114
SDI3, SDI4
I
Audio serial data input data terminal
Not used (open)
116
SYNC
I
Sync/unsync select signal input terminal
“L”: sync (fixed at “H”)
117 to 119
VSS
—
Ground terminal
120
VDDI
—
Power supply terminal (+2.5V)