Biostar M7VKQ M7VKQ user's manual - Page 51

Advanced Chipset Features, Advanced Chipset Setup, DRAM Timing By SPD, DRAM Clock

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Page 51 highlights

Chapter 2 BIOS Setup 2.4 Advanced Chipset Features This submenu allows you to configure the specific features of the chipset installed on your system. This chipset manages bus speeds and access to the system memory resources, such as DRAM and external cache. It also coordinates communications with the PCI bus. The default settings that came with your system have been optimized; and therefore, it should not be changed unless you are suspicious that the settings have been changed incorrectly. Figure 4. Advanced Chipset Setup DRAM Timing By SPD This item determines DRAM clock/timing follow SPD or not. The Choices: Enabled (default), Disabled. DRAM Clock This item determines DRAM Clock following 100 or 133MHz. The Choices: 133MHZ (default), 100MHZ. 2-14

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Chapter 2
BIOS Setup
2-14
2.4 Advanced Chipset Features
This submenu allows you to configure the specific features of the chipset installed on
your system. This chipset manages bus speeds and access to the system memory
resources, such as DRAM and external cache.
It also coordinates communications
with the PCI bus. The default settings that came with your system have been optimized;
and therefore, it should not be changed unless you are suspicious that the settings have
been changed incorrectly.
±
Figure 4. Advanced Chipset Setup
DRAM Timing By SPD
This item determines DRAM clock/timing follow SPD or not.
The Choices: Enabled
(default), Disabled.
DRAM Clock
This item determines DRAM Clock following 100 or 133MHz.
The Choices: 133MHZ
(default), 100MHZ.