Epson Apex 386SX/16 Canadian Product User Manual - Page 118

FF0000., Subsystem, 640KB

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ROM Subsystem The ROM subsystem has a 32K by 16-bit arrangement consisting of two 32K by &bit ROM/EPROM modules. The odd and even address codes reside in separate modules. The top of the first megabyte and the bottom of the last megabyte address space is assigned to ROM (hex 0F0000 and hex FF0000). Parity checking is not done on ROM. DTK BIOS has been provided in this subsystem. RAM Subsystem The RAM subsystem starts at address hex 000000 of the 16M address space. It consists of either 640KB or 1 MB in the form of 256K or 64K by 1 -bit RAM modules. Memory refresh forces one memory cycle every 15 microseconds through channel 1 of the timer/counter. The following functions are performed by the RAM initialization program: • Write operation to any memory location. • Initialization of channel 1 of the timer/counter to the rate generation mode (15 microseconds). Note: Memory can be used only after being accessed or refreshed eight times. 20 Chapter 6: Appendix

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ROM
Subsystem
The
ROM
subsystem
has
a
32K
by
16-bit
arrangement
consisting
of
two
32K
by
&bit
ROM/EPROM
modules.
The
odd
and
even
address
codes
reside
in
separate
modules.
The
top
of
the
first
megabyte
and
the
bottom
of
the
last
megabyte
address
space
is
assigned
to
ROM
(hex
0F0000
and
hex
FF0000).
Parity
checking
is
not
done
on
ROM.
DTK
BIOS
has
been
provided
in
this
subsystem.
RAM
Subsystem
The
RAM
subsystem
starts
at
address
hex
000000
of
the
16M
ad-
dress
space.
It
consists
of
either
640KB
or
1
MB
in
the
form
of
256K
or
64K
by
1
-bit
RAM
modules.
Memory
refresh
forces
one
memory
cycle
every
15
microseconds
through
channel
1
of
the
timer/counter.
The
following
functions
are
performed
by
the
RAM
initialization
pro-
gram:
•
Write
operation
to
any
memory
location.
•
Initialization
of
channel
1
of
the
timer/counter
to
the
rate
generation
mode
(15
microseconds).
Note:
Memory
can
be
used
only
after
being
accessed
or
refreshed
eight
times.
20
Chapter
6:
Appendix