Epson Apex 386SX/16 Canadian Product User Manual - Page 122

Expansion, Channels, Appendix

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D C Figure 6-11: 36-Pin Expansion Bus I/O Channels Math Coprocessor Control The math coprocessor functions as an I/O device through I/O port addresses hex 0F8, 0FA and 0FC. The microprocessor sends 0P codes and operands to I/O ports. The microprocessor also receives and stores results through the same I/O ports. The "busy" signal sent by the processor forces the microprocessor to wait until the coprocessor is finished executing. The following describes the math coprocessor controls: 0F0 The latched math coprocessor busy signal can be cleared with an 8-bit "out" command to port F0. The coprocessorwill latch "busy" if it asserts its error signal. Data output should be zero. 0F1 The math coprocessor will reset if an 8-bit "out" command is sent to port F1. Again, the data output should be zero. 24 Chapter 6: Appendix

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D
C
Figure
6-11: 36-Pin
Expansion
Bus
I/O
Channels
Math
Coprocessor
Control
The
math
coprocessor
functions
as
an
I/O
device
through
I/O
port
addresses
hex
0F8, 0FA
and
0FC.
The
microprocessor
sends
0P
codes
and
operands
to
I/O
ports.
The
microprocessor
also
receives
and
stores
results
through
the
same
I/O
ports.
The
“busy”
signal
sent
by
the
processor
forces
the
microprocessor
to
wait
until
the
coproces-
sor
is
finished
executing.
The
following
describes
the
math
coprocessor
controls:
0F0
The
latched
math
coprocessor
busy
signal
can
be
cleared
with
an
8-bit
“out”
command
to
port
F0.
The
coprocessorwill
latch
“busy”
if
it
asserts
its
error
signal.
Data
output
should
be
zero.
0F1
The
math
coprocessor
will
reset
if
an
8-bit “out”
command
is
sent
to
port
F1.
Again,
the
data
output
should
be
zero.
24
Chapter
6:
Appendix