Hitachi HTS541040G9AT00 Specifications - Page 175
When the Feature Register is 05h =Enable Advanced Power Management the Sector Count Register
UPC - 000059826569
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86H Disable Power-Up in Standby feature set 89H Disable Address Offset mode BBH 4 bytes of ECC apply on Read Long/Write Long commands C2H Disable Automatic Acoustic Management feature set CCH Enable reverting to power on defaults Note 1. When the Feature register is 03h (= Set Transfer mode) the Sector Count Register specifies the transfer mechanism. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value. PIO Default Transfer Mode PIO Default Transfer Mode, Disable IORDY PIO Flow Control Transfer Mode X Multiword DMA mode x Ultra DMA mode x bits (7:3) 00000 00000 00001 00100 01000 bits (2:0) 000 001 nnn nnn nnn (nnn=000,001,010,011,100) (nnn=000,001,010) (nnn=000,001,010,011,100) When the Feature Register is 05h (=Enable Advanced Power Management) the Sector Count Register specifies the Advanced Power Management level. C0h-FEh 80h-BFh 01h-7Fh 00h, FFh The deepest Power Saving Mode is Active Idle The deepest Power Saving Mode is Low Power Idle The deepest Power Saving Mode is Standby Aborted Note 2. If the number of auto reassigned sectors reaches the device's reassignment capacity, the write cache function will be automatically disabled. Although the device still accepts the Set Features command (with Feature register = 02h) without error, the write cache function will remain disabled. For the current write cache function status, refer to the Identify Device Information (129 word) by the Identify Device command. Hard reset or power off must not be done during the first 5 seconds after write command completion when write cache is enabled. Note 3. When the Feature register is 85h (=Disable Advanced Power Management), the deepest Power Saving mode becomes Active Idle. Travelstar 5K100 Hard Disk Drive Specification 161