Hitachi HTS541040G9AT00 Specifications - Page 77
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UPC - 000059826569
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10.0 Register Table 37: Register Set Addresses CS0- CS1- DA2 DA1 N N x x N A 0 x N A 1 0 N A 1 1 N A 1 1 A N 0 0 A N 0 0 A N 0 1 A N 0 1 A N 0 1 A N 1 0 A N 1 0 A N 1 0 A N 1 0 A N 1 1 A N 1 1 A N 1 1 A A x x Functions DA0 READ (DIOR-) WRITE (DIOW-) x Data bus high impedence Not used Control block registers x Data bus high impedance Not used x Data bus high impedance Not used 0 Alternate Status Device Control 1 Device Address Not used Command block registers 0 Data Data 1 Error Features 0 Sector Count Sector Count 1 LBA Low LBA Low 1 LBA bits 0-7 LBA bits 0-7 0 LBA Mid LBA Mid 0 LBA bits 8-15 LBA bits 8-15 1 LBA High LBA High 1 LBA bits 16-23 LBA bits 16-23 0 Device Device 0 LBA bits 24-27 LBA bits 24-27 1 Status Command x Invalid address Invalid address Logic conventions: A = signal asserted N = signal not asserted x = either A or N Communication to or from the device is through an I/O Register that routes the input or output data to or from the registers addressed by the signals from the host (CS0-, CS1-, DA2, DA1, DA0, DIOR- and DIOW). The Command Block Registers are used for sending commands to the device or posting status from the device. The Control Block Registers are used for device control and to post alternate status. Travelstar 5K100 Hard Disk Drive Specification 63