Intel BOXD955XCSLKR Product Specification - Page 50
Table 14., PCI Interrupt Routing Map
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Intel Desktop Board D955XCS Technical Product Specification Table 14. PCI Interrupt Routing Map PCI Interrupt Source IEEE-1394a/b controller PCI bus connector 1 PCI bus connector 2 PCI bus connector 3 PCI bus connector 4 PIRQA PIRQB INTD INTC ICH7-R PIRQ Signal Name PIRQC PIRQD PIRQE PIRQF INTA INTD INTA INTC INTB INTA INTB INTB INTA INTC PIRQG INTB INTA INTD PIRQH INTC INTD NOTE In PIC mode, the ICH7-R can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6, 7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 13 for the allocation of PIRQ lines to IRQ signals in APIC mode. PCI interrupt assignments to the USB ports, Serial ATA ports, and PCI Express ports are dynamic. 50