Intel D925XECV2 Product Specification - Page 60
Interrupts - windows 7
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Intel Desktop Boards D925XECV2/D925XEBC2 Technical Product Specification 2.6 Interrupts The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the Advanced Programmable Interrupt Controller (APIC) portion of the ICH6-R component. The PIC is supported in Windows 98 SE and Windows ME and uses the first 16 interrupts. The APIC is supported in Windows 2000 and Windows XP and supports a total of 24 interrupts. Table 15. Interrupts IRQ NMI 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Note 2) 17 (Note 2) 18 (Note 2) 19 (Note 2) 20 (Note 2) 21 (Note 2) 22 (Note 2) 23 (Note 2) System Resource I/O channel check Reserved, interval timer Reserved, keyboard buffer full Reserved, cascade interrupt from slave PIC User available COM1 (Note 1) LPT2 (Plug and Play option)/User available Diskette drive LPT1 (Note 1) Real-time clock User available User available User available Onboard mouse port (if present, else user available) Reserved, math coprocessor Primary IDE/Serial ATA (if present, else user available) Serial ATA (if present, else user available) User available (through PIRQA) User available (through PIRQB) User available (through PIRQC) User available (through PIRQD) User available (through PIRQE) User available (through PIRQF) User available (through PIRQG) User available (through PIRQH) Notes: 1. Default, but can be changed to another IRQ. 2. Available in APIC mode only. 60