Home » Intel Manuals » Processors » Intel Pga478 » Manual Viewer

Intel Pga478 Data Sheet - Page 38

Table 14., Alphabetical Signal Listing Sheet 2 of 12

UPC - 735858152471

Add to My Manuals
Save this manual to your list of manuals

Page 38 highlights

Intel® Celeron® Processor 1.66 GHz/1.83 GHz-Package Mechanical Specifications and Pin Information Table 14. Alphabetical Signal Listing (Sheet 2 of 12) Pin Name BCLK[1] BINIT# BNR# BPM[0]# BPM[1]# BPM[2]# BPM[3]# BPRI# BR0# BSEL[0] BSEL[1] BSEL[2] COMP[0] COMP[1] COMP[2] COMP[3] D[0]# D[1]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# D[16]# D[17]# D[18]# D[19]# D[2]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[3]# Pin Number Signal Buffer Type Direction A26 W5 F3 AF6 AD6 AC6 AE5 K5 M4 C20 D20 A21 P26 R26 P1 N1 D21 C22 H22 J22 K23 H23 L23 L22 D26 D24 E25 E26 F21 F24 F25 G26 G24 M22 K24 J24 H26 K26 J25 E22 Bus Clock Common Clock Common Clock Common Clock Common Clock Common Clock Common Clock Common Clock Common Clock CMOS CMOS CMOS Power/Other Power/Other Power/Other Power/Other Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Input Input/Output Input/Output Input/Output Output Output Input/Output Input Input/Output Output Output Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Intel® Celeron® Processor 1.66 GHz/1.83 GHz DS 38 January 2007 Order Number: 315876-002

Section	Page
Intel® Celeron® Processor 1.66 GHz/ 1.83 GHz	1
Contents	3
Figures	3
Tables	3
Revision History	5
1.0 Introduction	6
Note: The term AGTL+ is used to refer to Assisted GTL+ signaling technology on the processor.	7
1.1 Terminology	7
Table 1. Terminology (Sheet 1 of 2)	7
1.2 References	8
Table 2. References	8
1.3 State of Data	9
Note: All references to the Intel® Celeron® Processor 1.66 GHz/1.83 GHz in this document apply to the Intel® Celeron® Processor 1.66 GHz/1.83 GHz only, unless otherwise specified.	9
2.0 Low Power Features	10
2.1 Clock Control and Low Power States	10
Figure 1. Package-Level Low Power States	10
Figure 2. Core Low Power States	11
2.1.1 Core Low Power States	11
2.1.1.1 C0 State - Normal State	11
2.1.1.2 C1/AutoHALT Powerdown State	11
2.1.1.3 C1/MWAIT Powerdown State	12
2.1.2 Package Low Power States	12
2.1.2.1 Normal State	12
2.1.2.2 Stop-Grant State	12
2.1.2.3 Stop Grant Snoop State	13
2.1.2.4 Sleep State	13
2.2 Enhanced Intel® SpeedStep® Technology (EIST)	13
2.3 Extended Halt State (C1E)	13
Note: The Extended HALT (C1E) state must be enabled for the processor to remain within its specifications.	13
3.0 Electrical Specifications	15
3.1 Front Side Bus and GTLREF	15
3.2 Power and Ground Pins	15
3.3 Decoupling Guidelines	15
3.3.1 VCC Decoupling	15
3.3.2 FSB AGTL+ Decoupling	16
3.3.3 FSB Clock (BCLK[1:0]) and Processor Clocking	16
3.4 Voltage Identification and Power Sequencing	16
Table 3. Intel® Celeron® Processor 1.66 GHz/1.83 GHz VID Map (Sheet 1 of 3)	16
3.5 Catastrophic Thermal Protection	18
3.6 Signal Terminations and Unused Pins	18
Note: The TEST1 and TEST2 pins have unique signal termination requirements. It is mandatory that the TEST2 pin have a 51 W +/-5% pull down resistor to Vss. Please refer to Table 11 for details.	18
3.7 FSB Frequency Select Signals (BSEL[2:0])	18
Table 4. BSEL[2:0] Encoding for BCLK Frequency	18
3.8 FSB Signal Groups	19
Table 5. FSB Pin Groups	19
3.9 CMOS Signals	20
3.10 Maximum Ratings	20
Table 6. Processor DC Absolute Maximum Ratings	20
3.11 Processor DC Specifications	20
Note: The processor DC specifications in this section are defined at the processor core (pads) unless noted otherwise.	20
Table 7. Voltage and Current Specifications for the Intel® Celeron® Processor 1.66 GHz/1.83 GHz	21
Figure 3. Active VCC and ICC Load Line for Intel® Celeron® Processor 1.66 GHz/1.83 GHz	22
Table 8. AGTL+ Signal Group DC Specifications (Sheet 1 of 2)	22
Table 9. CMOS Signal Group DC Specifications	23
Table 10. Open Drain Signal Group DC Specifications	24
4.0 Package Mechanical Specifications and Pin Information	25
4.1 Package Mechanical Specifications	25
4.1.1 Package Mechanical Drawings	25
Figure 4. Micro-FCPGA Package Top and Bottom Views	25
Figure 5. Micro-FCPGA Processor Package Drawing (Sheet 1)	26
Figure 6. Micro-FCPGA Processor Package Drawing (Sheet 2)	27
4.1.2 Processor Component Keep-Out Zones	27
4.1.3 Package Loading Specifications	28
4.1.4 Processor Mass Specifications	28
4.2 Processor Pin-Out and Pin List	28
Figure 7. The Coordinates of the Processor Pins as Viewed From the Top of the Package	29
4.2.1 Alphabetical Signals Reference	30
Table 11. Signal Description (Sheet 1 of 7)	30
Table 12. Quad-Pumped Signal Groups	32
Table 13. DINV[3:0]# Assignment To Data Bus	32
Table 14. Alphabetical Signal Listing (Sheet 1 of 12)	37
Table 15. Alphabetical Pin Listing (Sheet 1 of 12)	49
5.0 Thermal Specifications and Design Considerations	61
Table 16. Power Specifications for the Intel® Celeron® Processor 1.66 GHz/1.83 GHz (Sheet 1 of 2)	61
5.1 Thermal Specifications	62
5.1.1 Thermal Diode	62
Note: The reading of the external thermal sensor (on the motherboard) connected to the processor thermal diode signals, does not...	62
Table 17. Thermal Diode Interface	63
Table 18. Thermal “Diode” Parameters using Diode Mode	63
5.1.2 Thermal Diode Offset	64
Table 19. Thermal “Diode” ntrim and Diode Correction Toffset	64
5.1.3 Intel® Thermal Monitor	64
Note: The Intel thermal monitor automatic mode must be enabled through BIOS for the processor to be operating within specifications.	64
Note: Intel recommends both Thermal Monitor 1 (TM1) and Thermal Monitor 2 (TM2) be always enabled on Intel® Celeron® Processor 1.66 GHz/1.83 GHz.	64
Note: The Intel® Celeron® Processor 1.66 GHz/1.83 GHz only supports TM2 initiated voltage/ frequency transitions. Intel® Celeron...	65
Note: PROCHOT# is not asserted when the processor is in the Stop Grant, and Sleep, low power states (internal clocks stopped), h...	65
5.1.4 Digital Thermal Sensor	66
5.1.5 Out of Specification Detection	66
5.1.6 PROCHOT# Signal Pin	66
5.1.7 FORCEPR# Signal Pin	67

Match case Limit results 1 per page

Intel

Celeron

Processor 1.66 GHz/1.83 GHz—Package Mechanical Specifications and Pin

Information

Intel

Celeron

Processor 1.66 GHz/1.83 GHz

January 2007

Order Number: 315876-002

BCLK[1]

A26

Bus Clock

Input

BINIT#

Common Clock

Input/Output

BNR#

Common Clock

Input/Output

BPM[0]#

AF6

Common Clock

Input/Output

BPM[1]#

AD6

Common Clock

Output

BPM[2]#

AC6

Common Clock

Output

BPM[3]#

AE5

Common Clock

Input/Output

BPRI#

Common Clock

Input

BR0#

Common Clock

Input/Output

BSEL[0]

C20

CMOS

Output

BSEL[1]

D20

CMOS

Output

BSEL[2]

A21

CMOS

Output

COMP[0]

P26

Power/Other

Input/Output

COMP[1]

R26

Power/Other

Input/Output

COMP[2]

Power/Other

Input/Output

COMP[3]

Power/Other

Input/Output

D[0]#

D21

Source Sync

Input/Output

D[1]#

C22

Source Sync

Input/Output

D[10]#

H22

Source Sync

Input/Output

D[11]#

J22

Source Sync

Input/Output

D[12]#

K23

Source Sync

Input/Output

D[13]#

H23

Source Sync

Input/Output

D[14]#

L23

Source Sync

Input/Output

D[15]#

L22

Source Sync

Input/Output

D[16]#

D26

Source Sync

Input/Output

D[17]#

D24

Source Sync

Input/Output

D[18]#

E25

Source Sync

Input/Output

D[19]#

E26

Source Sync

Input/Output

D[2]#

F21

Source Sync

Input/Output

D[20]#

F24

Source Sync

Input/Output

D[21]#

F25

Source Sync

Input/Output

D[22]#

G26

Source Sync

Input/Output

D[23]#

G24

Source Sync

Input/Output

D[24]#

M22

Source Sync

Input/Output

D[25]#

K24

Source Sync

Input/Output

D[26]#

J24

Source Sync

Input/Output

D[27]#

H26

Source Sync

Input/Output

D[28]#

K26

Source Sync

Input/Output

D[29]#

J25

Source Sync

Input/Output

D[3]#

E22

Source Sync

Input/Output

Table 14.

Alphabetical Signal Listing (Sheet 2 of 12)

Pin Name

Pin Number

Signal Buffer Type

Direction