Intel Pga478 Data Sheet - Page 65
Enhanced Intel
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Thermal Specifications and Design Considerations-Intel® Celeron® Processor 1.66 GHz/1.83 GHz Note: Note: Likewise, when Intel Thermal Monitor 2 is enabled, and a high temperature situation exists, the processor performs an voltage/frequency transition to a lower operating point. When the processor temperature drops below the critical level, the processor makes an voltage/frequency transition to the last requested operating point. The Intel® Celeron® Processor 1.66 GHz/1.83 GHz only supports TM2 initiated voltage/ frequency transitions. Intel® Celeron® Processor 1.66 GHz/1.83 GHz does not support Enhanced Intel® SpeedStep® Technology (EIST) therefore it does not support software or MSR based EIST transitions. Likewise, when TM1 is enabled, and a high temperature situation exists, the clocks are modulated by alternately turning the clocks off and on at a 50% duty cycle (automatic mode). Cycle times are processor speed dependent and decreases linearly as processor core frequencies increase. Once the temperature has returned to a non-critical level, modulation ceases and TCC goes inactive. A small amount of hysteresis has been included to prevent rapid active/inactive transitions of the TCC when the processor temperature is near the trip point. The duty cycle is factory configured and cannot be modified. Also, automatic mode does not require any additional hardware, software drivers, or interrupt handling routines. Processor performance is decreased by the same amount as the duty cycle when the TCC is active. The TCC may also be activated via on-demand mode. If bit 4 of the ACPI Intel Thermal Monitor control register is written to a 1, the TCC is activated immediately, independent of the processor temperature. When using on-demand mode to activate the TCC, the duty cycle of the clock modulation is programmable via bits 3:1 of the same ACPI Intel Thermal Monitor control register. In automatic mode, the duty cycle is fixed at 50% on, 50% off, however in on-demand mode, the duty cycle can be programmed from 12.5% on/ 87.5% off, to 87.5% on/12.5% off in 12.5% increments. On-demand mode may be used at the same time automatic mode is enabled, however, if the system tries to enable the TCC via on-demand mode at the same time automatic mode is enabled and a high temperature condition exists, automatic mode takes precedence An external signal, PROCHOT# (processor hot) is asserted when the processor detects that its temperature is above the thermal trip point. Bus snooping and interrupt latching are also active while the TCC is active. Besides the thermal sensor and thermal control circuit, the Intel Thermal Monitor also includes one ACPI register, one performance counter register, three model specific registers (MSR), one output pin (PROCHOT#), and one input pin (FORCEPR#). All are available to monitor and control the state of the Intel thermal monitor feature. The Intel thermal monitor can be configured to generate an interrupt upon the assertion or deassertion of PROCHOT#. PROCHOT# is not asserted when the processor is in the Stop Grant, and Sleep, low power states (internal clocks stopped), hence the thermal diode reading must be used as a safeguard to maintain the processor junction temperature within maximum specification. If the platform thermal solution is not able to maintain the processor junction temperature within the maximum specification, the system must initiate an orderly shutdown to prevent damage. If the processor enters a low power state with PROCHOT# already asserted, PROCHOT# remains asserted until the processor exits the low power state and the processor junction temperature drops below the thermal trip point. If Thermal Monitor automatic mode is disabled, the processor is operating out of specification. Regardless of enabling the automatic or on-demand modes, in the event of a catastrophic cooling failure, the processor automatically shuts down when the silicon has reached a temperature of approximately 125 °C. At this point the THERMTRIP# signal goes active. THERMTRIP# activation is independent of processor activity and does not generate any bus cycles. When THERMTRIP# is asserted, the processor core voltage must be shut down within the time specified in Chapter 3.0. January 2007 Order Number: 315876-002 Intel® Celeron® Processor 1.66 GHz/1.83 GHz DS 65