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Intel Pga478 Data Sheet - Page 40

Table 14., Alphabetical Signal Listing Sheet 4 of 12

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Intel® Celeron® Processor 1.66 GHz/1.83 GHz-Package Mechanical Specifications and Pin Information Table 14. Alphabetical Signal Listing (Sheet 4 of 12) Pin Name DBSY# DEFER# DINV#[0] DINV#[1] DINV#[2] DINV#[3] DP[0]# DP[1]# DP[2]# DP[3]# DRDY# DSTBN[0]# DSTBN[1]# DSTBN[2]# DSTBN[3]# DSTBP[0]# DSTBP[1]# DSTBP[2]# DSTBP[3]# FERR# FORCEPR# GTLREF HIT# HITM# IERR# IGNNE# INIT# LINT0 LINT1 LOCK# MCERR# ODTEN PRDY# PREQ# PROCHOT# PWRGOOD REQ[0]# REQ[1]# REQ[2]# REQ[3]# Pin Number Signal Buffer Type Direction H6 J6 C24 H25 V26 AA23 L26 M25 P25 M24 G5 J21 M21 R21 V21 K21 N21 T21 W21 B5 A2 AD26 E3 J4 C21 E6 D5 B4 B6 F4 K4 F6 AD5 AF4 B25 A4 L2 H3 H2 J3 Common Clock Common Clock Source Sync Source Sync Source Sync Source Sync Common Clock Common Clock Common Clock Common Clock Common Clock Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Source Sync Open Drain CMOS Power/Other Common Clock Common Clock Open Drain CMOS CMOS CMOS CMOS Common Clock Common Clock Power/Other Common Clock Common Clock Open Drain CMOS Source Sync Source Sync Source Sync Source Sync Input/Output Input Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Input/Output Output Input Input Input/Output Input/Output Output Input Input Input Input Input/Output Input/Output Input Output Input Output Input Input/Output Input/Output Input/Output Input/Output Intel® Celeron® Processor 1.66 GHz/1.83 GHz DS 40 January 2007 Order Number: 315876-002

Section	Page
Intel® Celeron® Processor 1.66 GHz/ 1.83 GHz	1
Contents	3
Figures	3
Tables	3
Revision History	5
1.0 Introduction	6
Note: The term AGTL+ is used to refer to Assisted GTL+ signaling technology on the processor.	7
1.1 Terminology	7
Table 1. Terminology (Sheet 1 of 2)	7
1.2 References	8
Table 2. References	8
1.3 State of Data	9
Note: All references to the Intel® Celeron® Processor 1.66 GHz/1.83 GHz in this document apply to the Intel® Celeron® Processor 1.66 GHz/1.83 GHz only, unless otherwise specified.	9
2.0 Low Power Features	10
2.1 Clock Control and Low Power States	10
Figure 1. Package-Level Low Power States	10
Figure 2. Core Low Power States	11
2.1.1 Core Low Power States	11
2.1.1.1 C0 State - Normal State	11
2.1.1.2 C1/AutoHALT Powerdown State	11
2.1.1.3 C1/MWAIT Powerdown State	12
2.1.2 Package Low Power States	12
2.1.2.1 Normal State	12
2.1.2.2 Stop-Grant State	12
2.1.2.3 Stop Grant Snoop State	13
2.1.2.4 Sleep State	13
2.2 Enhanced Intel® SpeedStep® Technology (EIST)	13
2.3 Extended Halt State (C1E)	13
Note: The Extended HALT (C1E) state must be enabled for the processor to remain within its specifications.	13
3.0 Electrical Specifications	15
3.1 Front Side Bus and GTLREF	15
3.2 Power and Ground Pins	15
3.3 Decoupling Guidelines	15
3.3.1 VCC Decoupling	15
3.3.2 FSB AGTL+ Decoupling	16
3.3.3 FSB Clock (BCLK[1:0]) and Processor Clocking	16
3.4 Voltage Identification and Power Sequencing	16
Table 3. Intel® Celeron® Processor 1.66 GHz/1.83 GHz VID Map (Sheet 1 of 3)	16
3.5 Catastrophic Thermal Protection	18
3.6 Signal Terminations and Unused Pins	18
Note: The TEST1 and TEST2 pins have unique signal termination requirements. It is mandatory that the TEST2 pin have a 51 W +/-5% pull down resistor to Vss. Please refer to Table 11 for details.	18
3.7 FSB Frequency Select Signals (BSEL[2:0])	18
Table 4. BSEL[2:0] Encoding for BCLK Frequency	18
3.8 FSB Signal Groups	19
Table 5. FSB Pin Groups	19
3.9 CMOS Signals	20
3.10 Maximum Ratings	20
Table 6. Processor DC Absolute Maximum Ratings	20
3.11 Processor DC Specifications	20
Note: The processor DC specifications in this section are defined at the processor core (pads) unless noted otherwise.	20
Table 7. Voltage and Current Specifications for the Intel® Celeron® Processor 1.66 GHz/1.83 GHz	21
Figure 3. Active VCC and ICC Load Line for Intel® Celeron® Processor 1.66 GHz/1.83 GHz	22
Table 8. AGTL+ Signal Group DC Specifications (Sheet 1 of 2)	22
Table 9. CMOS Signal Group DC Specifications	23
Table 10. Open Drain Signal Group DC Specifications	24
4.0 Package Mechanical Specifications and Pin Information	25
4.1 Package Mechanical Specifications	25
4.1.1 Package Mechanical Drawings	25
Figure 4. Micro-FCPGA Package Top and Bottom Views	25
Figure 5. Micro-FCPGA Processor Package Drawing (Sheet 1)	26
Figure 6. Micro-FCPGA Processor Package Drawing (Sheet 2)	27
4.1.2 Processor Component Keep-Out Zones	27
4.1.3 Package Loading Specifications	28
4.1.4 Processor Mass Specifications	28
4.2 Processor Pin-Out and Pin List	28
Figure 7. The Coordinates of the Processor Pins as Viewed From the Top of the Package	29
4.2.1 Alphabetical Signals Reference	30
Table 11. Signal Description (Sheet 1 of 7)	30
Table 12. Quad-Pumped Signal Groups	32
Table 13. DINV[3:0]# Assignment To Data Bus	32
Table 14. Alphabetical Signal Listing (Sheet 1 of 12)	37
Table 15. Alphabetical Pin Listing (Sheet 1 of 12)	49
5.0 Thermal Specifications and Design Considerations	61
Table 16. Power Specifications for the Intel® Celeron® Processor 1.66 GHz/1.83 GHz (Sheet 1 of 2)	61
5.1 Thermal Specifications	62
5.1.1 Thermal Diode	62
Note: The reading of the external thermal sensor (on the motherboard) connected to the processor thermal diode signals, does not...	62
Table 17. Thermal Diode Interface	63
Table 18. Thermal “Diode” Parameters using Diode Mode	63
5.1.2 Thermal Diode Offset	64
Table 19. Thermal “Diode” ntrim and Diode Correction Toffset	64
5.1.3 Intel® Thermal Monitor	64
Note: The Intel thermal monitor automatic mode must be enabled through BIOS for the processor to be operating within specifications.	64
Note: Intel recommends both Thermal Monitor 1 (TM1) and Thermal Monitor 2 (TM2) be always enabled on Intel® Celeron® Processor 1.66 GHz/1.83 GHz.	64
Note: The Intel® Celeron® Processor 1.66 GHz/1.83 GHz only supports TM2 initiated voltage/ frequency transitions. Intel® Celeron...	65
Note: PROCHOT# is not asserted when the processor is in the Stop Grant, and Sleep, low power states (internal clocks stopped), h...	65
5.1.4 Digital Thermal Sensor	66
5.1.5 Out of Specification Detection	66
5.1.6 PROCHOT# Signal Pin	66
5.1.7 FORCEPR# Signal Pin	67

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Intel

Celeron

Processor 1.66 GHz/1.83 GHz—Package Mechanical Specifications and Pin

Information

Intel

Celeron

Processor 1.66 GHz/1.83 GHz

January 2007

Order Number: 315876-002

DBSY#

Common Clock

Input/Output

DEFER#

Common Clock

Input

DINV#[0]

C24

Source Sync

Input/Output

DINV#[1]

H25

Source Sync

Input/Output

DINV#[2]

V26

Source Sync

Input/Output

DINV#[3]

AA23

Source Sync

Input/Output

DP[0]#

L26

Common Clock

Input/Output

DP[1]#

M25

Common Clock

Input/Output

DP[2]#

P25

Common Clock

Input/Output

DP[3]#

M24

Common Clock

Input/Output

DRDY#

Common Clock

Input/Output

DSTBN[0]#

J21

Source Sync

Input/Output

DSTBN[1]#

M21

Source Sync

Input/Output

DSTBN[2]#

R21

Source Sync

Input/Output

DSTBN[3]#

V21

Source Sync

Input/Output

DSTBP[0]#

K21

Source Sync

Input/Output

DSTBP[1]#

N21

Source Sync

Input/Output

DSTBP[2]#

T21

Source Sync

Input/Output

DSTBP[3]#

W21

Source Sync

Input/Output

FERR#

Open Drain

Output

FORCEPR#

CMOS

Input

GTLREF

AD26

Power/Other

Input

HIT#

Common Clock

Input/Output

HITM#

Common Clock

Input/Output

IERR#

C21

Open Drain

Output

IGNNE#

CMOS

Input

INIT#

CMOS

Input

LINT0

CMOS

Input

LINT1

CMOS

Input

LOCK#

Common Clock

Input/Output

MCERR#

Common Clock

Input/Output

ODTEN

Power/Other

Input

PRDY#

AD5

Common Clock

Output

PREQ#

AF4

Common Clock

Input

PROCHOT#

B25

Open Drain

Output

PWRGOOD

CMOS

Input

REQ[0]#

Source Sync

Input/Output

REQ[1]#

Source Sync

Input/Output

REQ[2]#

Source Sync

Input/Output

REQ[3]#

Source Sync

Input/Output

Table 14.

Alphabetical Signal Listing (Sheet 4 of 12)

Pin Name

Pin Number

Signal Buffer Type

Direction