Intel S3420GPLX User Guide - Page 54

Table 7. Diagnostic LED POST Code Decoder, Table 6. POST Progress Code LED Example

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. LEDs Table 6. POST Progress Code LED Example Upper Nibble LEDs Lower Nibble LEDs LEDs Status Results MSB LED #7 8h ON LED #6 4h OFF LED #5 2h ON LED #4 1h OFF LED #3 8h ON LED #2 4h ON LED #1 2h OFF 1 0 1 0 1 1 0 Ah Ch LED #0 1h OFF 0 • Upper nibble bits = 1010b = Ah; Lower nibble bits = 1100b = Ch; the two are concatenated as ACh. Table 7. Diagnostic LED POST Code Decoder Diagnostic LED Decoder Checkpoint O = On, X = Off Description Upper Nibble Lower Nibble MSB LSB 8h 4h 2h 1h 8h 4h 2h 1h LED #7 #6 #5 #4 #3 #2 #1 #0 Host Processor 0x10h X X X O X X X X Power-on initialization of the host processor (bootstrap processor) 0x11h X X X O X X X O Host processor cache initialization (including AP) 0x12h X X X O X X O X Starting application processor initialization 0x13h X X X O X X O O SMM initialization Chipset 0x21h X X O X X X X O Initializing a chipset component Memory 52 Intel® Server Board S3420GP User Guide

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52
Intel® Server Board S3420GP User Guide
.
•
Upper nibble bits = 1010b = Ah; Lower nibble bits = 1100b = Ch; the two are
concatenated as ACh.
Table 6. POST Progress Code LED Example
LEDs
Upper Nibble LEDs
Lower Nibble LEDs
LEDs
MSB
LED #7
LED #6
LED #5
LED #4
LED #3
LED #2
LED #1
LED #0
8h
4h
2h
1h
8h
4h
2h
1h
Status
ON
OFF
ON
OFF
ON
ON
OFF
OFF
Results
1
0
1
0
1
1
0
0
Ah
Ch
Table 7. Diagnostic LED POST Code Decoder
Diagnostic LED Decoder
Checkpoint
O = On, X = Off
Description
Upper Nibble
Lower Nibble
MSB
LSB
8h
4h
2h
1h
8h
4h
2h
1h
LED
#7
#6
#5
#4
#3
#2
#1
#0
Host Processor
0x10h
X
X
X
O
X
X
X
X
Power-on initialization of
the host processor
(bootstrap processor)
0x11h
X
X
X
O
X
X
X
O
Host processor cache
initialization (including AP)
0x12h
X
X
X
O
X
X
O
X
Starting application
processor initialization
0x13h
X
X
X
O
X
X
O
O
SMM initialization
Chipset
0x21h
X
X
O
X
X
X
X
O
Initializing a chipset
component
Memory