MSI Z77A User Guide - Page 54

Current CPU Core Voltage/ Current CPU I/O Core Voltage/ Current DRAM Volt

Page 54 highlights

BIOS Setup ▶ My OC Genie Long duration maintained This field allows you to customize Long duration maintained for OC Genie function. ▶ My OC Genie Short duration power limit This field allows you to customize Short duration power imit for OC Genie function. ▶ My CPU Core Voltage/ My OC Genie CPU I/O Voltage/ My OC Genie DRAM Voltage/ My OC Genie GPU Voltage These items are used to specific the voltage of CPU, Memory, GPU and chipset for OC Genie function. ▶ Current CPU Core Voltage/ Current CPU I/O Core Voltage/ Current DRAM Volt- age/ Current GPU Voltage These items show current CPU/ CPU I/O/ DRAM/ GPU voltage. Read-only. ▶ DRAM Reference Clock This item allows you to specific the DRAM Reference Clock for CPU. Please note the overclocking behavior is not guaranteed. ▶ DRAM Frequency This item allows you to adjust the DRAM frequency. Please note the overclocking behavior is not guaranteed. ▶ Adjusted DRAM Frequency It shows the adjusted DRAM frequency. Read-only. ▶ Extreme Memory Profile (X.M.P) This item is used to enable/disable the Intel Extreme Memory Profile (XMP). For further information please refer to Intel's official website. ▶ DRAM Timing Mode Select whether DRAM timing is controlled by the SPD (Serial Presence Detect) EEPROM on the DRAM module. Setting to [Auto] enables DRAM timings and the following "Advanced DRAM Configuration" sub-menu to be determined by BIOS based on the configurations on the SPD. Selecting [Link] or [Unlink] allows users to configure the DRAM timings for each channel and the following related "Advanced DRAM Configuration" sub-menu manually. ▶ Advanced DRAM Configuration Press to enter the sub-menu. ▶ Command Rate This setting controls the DRAM command rate. ▶ tCL Controls CAS latency which determines the timing delay (in clock cycles) of starting a read command after receiving data. ▶ tRCD Determines the timing of the transition from RAS (row address strobe) to CAS (column address strobe). The less clock cycles, the faster the DRAM performance. 2-12

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BIOS Setup
My OC Gen±e Long durat±on ma±nta±ned
Th±s field allows you to custom±ze Long durat±on ma±nta±ned for OC Gen±e funct±on.
My OC Gen±e Short durat±on power l±m±t
Th±s field allows you to custom±ze Short durat±on power ±m±t for OC Gen±e funct±on.
My CPU Core Voltage/ My OC Gen±e CPU I/O Voltage/ My OC Gen±e DRAM
Voltage/ My OC Gen±e GPU Voltage
These ±tems are used to spec±fic the voltage of CPU, Memory, GPU and ch±pset for
OC Gen±e funct±on.
Current CPU Core Voltage/ Current CPU I/O Core Voltage/ Current DRAM Volt-
age/ Current GPU Voltage
These ±tems show current CPU/ CPU I/O/ DRAM/ GPU voltage. Read-only.
DRAM Reference Clock
Th±s ±tem allows you to spec±fic the DRAM Reference Clock for CPU. Please note the
overclock±ng behav±or ±s not guaranteed.
DRAM Frequency
Th±s ±tem allows you to adjust the DRAM frequency. Please note the overclock±ng be-
hav±or ±s not guaranteed.
Adjusted DRAM Frequency
It shows the adjusted DRAM frequency. Read-only.
Extreme Memory Profile (X.M.P)
Th±s ±tem ±s used to enable/d±sable the Intel Extreme Memory Profile (XMP). For further
±nformat±on please refer to Intel’s offic±al webs±te.
DRAM T±m±ng Mode
Select whether DRAM t±m±ng ±s controlled by the SPD (Ser±al Presence Detect) EE-
PROM on the DRAM module. Sett±ng to [Auto] enables DRAM t±m±ngs and the follow±ng
“Advanced DRAM Configurat±on” sub-menu to be determ±ned by BIOS based on the
configurat±ons on the SPD. Select±ng [L±nk] or [Unl±nk] allows users to configure the
DRAM t±m±ngs for each channel and the follow±ng related “Advanced DRAM Configura-
t±on” sub-menu manually.
Advanced DRAM Configurat±on
Press <Enter> to enter the sub-menu.
Command Rate
Th±s sett±ng controls the DRAM command rate.
tCL
Controls CAS latency wh±ch determ±nes the t±m±ng delay (±n clock cycles) of start±ng
a read command after rece±v±ng data.
tRCD
Determ±nes the t±m±ng of the trans±t±on from RAS (row address strobe) to CAS (col-
umn address strobe). The less clock cycles, the faster the DRAM performance.